diff options
| author | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-10-05 13:40:31 +0000 |
|---|---|---|
| committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-10-05 13:40:31 +0000 |
| commit | 5692c5733633bfb8b23f1111de152eff0233b713 (patch) | |
| tree | d315817986c71d6710f75dceb87689b95e1bff53 /src/southbridge/amd/sb600 | |
| parent | d0835953506263b0d9218b62176693315f2ef2f3 (diff) | |
| download | coreboot-5692c5733633bfb8b23f1111de152eff0233b713.tar.xz | |
- move EHCI_BAR_INDEX to ehci.h - it's constant as per EHCI spec 2.3.1
- move EHCI_BAR and EHCI_DEBUG_OFFSET to Kconfig to be set by USB debug port enabled southbridges
- drop USB debug code includes from romstage.cs and use romstage-srcs in the build system instead
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5911 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd/sb600')
| -rw-r--r-- | src/southbridge/amd/sb600/Kconfig | 8 | ||||
| -rw-r--r-- | src/southbridge/amd/sb600/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/southbridge/amd/sb600/sb600.h | 1 | ||||
| -rw-r--r-- | src/southbridge/amd/sb600/sb600_enable_usbdebug.c | 11 |
4 files changed, 15 insertions, 6 deletions
diff --git a/src/southbridge/amd/sb600/Kconfig b/src/southbridge/amd/sb600/Kconfig index ed4072dc2e..5af6b134e0 100644 --- a/src/southbridge/amd/sb600/Kconfig +++ b/src/southbridge/amd/sb600/Kconfig @@ -22,3 +22,11 @@ config SOUTHBRIDGE_AMD_SB600 select IOAPIC select HAVE_USBDEBUG +config EHCI_BAR + hex + default 0xfef00000 if SOUTHBRIDGE_AMD_SB600 + +config EHCI_DEBUG_OFFSET + hex + default 0xe0 if SOUTHBRIDGE_AMD_SB600 + diff --git a/src/southbridge/amd/sb600/Makefile.inc b/src/southbridge/amd/sb600/Makefile.inc index b13d3de01f..854539b9b3 100644 --- a/src/southbridge/amd/sb600/Makefile.inc +++ b/src/southbridge/amd/sb600/Makefile.inc @@ -8,3 +8,4 @@ driver-y += sb600_hda.c driver-y += sb600_ac97.c driver-y += sb600_pci.c ramstage-y += sb600_reset.c +romstage-y += sb600_enable_usbdebug.c diff --git a/src/southbridge/amd/sb600/sb600.h b/src/southbridge/amd/sb600/sb600.h index 629f389973..0ba107acc7 100644 --- a/src/southbridge/amd/sb600/sb600.h +++ b/src/southbridge/amd/sb600/sb600.h @@ -40,4 +40,5 @@ void sb600_enable(device_t dev); void sb600_lpc_port80(void); void sb600_pci_port80(void); +void sb600_enable_usbdebug(unsigned int port); #endif /* SB600_H */ diff --git a/src/southbridge/amd/sb600/sb600_enable_usbdebug.c b/src/southbridge/amd/sb600/sb600_enable_usbdebug.c index 6a150aded0..b4d97b0da2 100644 --- a/src/southbridge/amd/sb600/sb600_enable_usbdebug.c +++ b/src/southbridge/amd/sb600/sb600_enable_usbdebug.c @@ -18,12 +18,11 @@ */ #include <stdint.h> +#include <arch/io.h> +#include <arch/romcc_io.h> #include <usbdebug.h> #include <device/pci_def.h> - -#define EHCI_BAR 0xFEF00000 /* EHCI BAR address */ -#define EHCI_BAR_INDEX 0x10 /* TODO: DBUG_PRT[31:29] */ -#define EHCI_DEBUG_OFFSET 0xE0 /* Hardcoded to 0xE0 */ +#include "sb600.h" /* Required for successful build, but currently empty. */ void set_debug_port(unsigned int port) @@ -31,7 +30,7 @@ void set_debug_port(unsigned int port) /* TODO: Allow changing the physical USB port used as Debug Port. */ } -static void sb600_enable_usbdebug(unsigned int port) +void sb600_enable_usbdebug(unsigned int port) { device_t dev = PCI_DEV(0, 0x13, 5); /* USB EHCI, D19:F5 */ @@ -39,7 +38,7 @@ static void sb600_enable_usbdebug(unsigned int port) set_debug_port(port); /* Set the EHCI BAR address. */ - pci_write_config32(dev, EHCI_BAR_INDEX, EHCI_BAR); + pci_write_config32(dev, EHCI_BAR_INDEX, CONFIG_EHCI_BAR); /* Enable access to the EHCI memory space registers. */ pci_write_config8(dev, PCI_COMMAND, PCI_COMMAND_MEMORY); |