summaryrefslogtreecommitdiff
path: root/src/southbridge/amd/sb700/lpc.c
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2015-01-09 23:48:47 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2015-01-10 13:53:51 +0100
commit78c5d584a087265e44b076647db19efd4db4a7bb (patch)
tree0f5e32c90cf0fb17db36d514baf6afc9c037d728 /src/southbridge/amd/sb700/lpc.c
parent2320cbebc667ac6871d4d6c8b59fee27ba6e75e5 (diff)
downloadcoreboot-78c5d584a087265e44b076647db19efd4db4a7bb.tar.xz
ACPI: Add acpi_is_wakeup_s3() for romstage
This replaces acpi_is_wakeup_early(). Change-Id: I23112c1fc7b6f99584bc065fbf6b10fb073b1eb6 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8187 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/southbridge/amd/sb700/lpc.c')
-rw-r--r--src/southbridge/amd/sb700/lpc.c17
1 files changed, 6 insertions, 11 deletions
diff --git a/src/southbridge/amd/sb700/lpc.c b/src/southbridge/amd/sb700/lpc.c
index 8ebc765c0b..658e95498e 100644
--- a/src/southbridge/amd/sb700/lpc.c
+++ b/src/southbridge/amd/sb700/lpc.c
@@ -29,7 +29,6 @@
#include <pc80/isa-dma.h>
#include <arch/io.h>
#include <arch/ioapic.h>
-#include <arch/acpi.h>
#include <cbmem.h>
#include <cpu/amd/powernow.h>
#include "sb700.h"
@@ -80,19 +79,15 @@ static void lpc_init(device_t dev)
#endif
pci_write_config8(dev, 0x78, byte);
- /* hack, but the whole sb700 startup lacks any device which
- is doing the acpi init */
-#if CONFIG_HAVE_ACPI_RESUME
- {
- u16 tmp = inw(ACPI_PM1_CNT_BLK);
- acpi_slp_type = ((tmp & (7 << 10)) >> 10);
- printk(BIOS_DEBUG, "SLP_TYP type was %x\n", acpi_slp_type);
- }
-#endif
-
cmos_check_update_date();
}
+int acpi_get_sleep_type(void)
+{
+ u16 tmp = inw(ACPI_PM1_CNT_BLK);
+ return ((tmp & (7 << 10)) >> 10);
+}
+
void backup_top_of_ram(uint64_t ramtop)
{
u32 dword = (u32) ramtop;