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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-09-04 13:26:11 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-09-11 07:18:02 +0200 |
| commit | bc90e15d3f8e841ccf229fca5d7df99436ff4bdb (patch) | |
| tree | bbbd4f2904b42d201d7e2fbccea5bfcbeeeed166 /src/southbridge/amd/sb700/lpc.c | |
| parent | c04afd6433cd53acdc727ad760cde9c40090030b (diff) | |
| download | coreboot-bc90e15d3f8e841ccf229fca5d7df99436ff4bdb.tar.xz | |
CBMEM: Backup top_of_ram instead of cbmem_toc
AMD northbridges have a complex way to resolve top_of_ram.
Once it is resolved, it is stored in NVRAM to be used on resume.
TODO: Redesign these get_top_of_ram() functions from scratch.
Change-Id: I3cceb7e9b8b07620dacf138e99f98dc818c65341
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3557
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/southbridge/amd/sb700/lpc.c')
| -rw-r--r-- | src/southbridge/amd/sb700/lpc.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/amd/sb700/lpc.c b/src/southbridge/amd/sb700/lpc.c index 23775b0cf2..a175210be6 100644 --- a/src/southbridge/amd/sb700/lpc.c +++ b/src/southbridge/amd/sb700/lpc.c @@ -84,9 +84,9 @@ static void lpc_init(device_t dev) rtc_check_update_cmos_date(RTC_HAS_ALTCENTURY); } -void set_cbmem_toc(struct cbmem_entry *toc) +void backup_top_of_ram(uint64_t ramtop) { - u32 dword = (u32) toc; + u32 dword = (u32) ramtop; int nvram_pos = 0xfc, i; for (i = 0; i<4; i++) { outb(nvram_pos, BIOSRAM_INDEX); |