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authorKyösti Mälkki <kyosti.malkki@gmail.com>2013-09-04 13:31:39 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2013-09-11 07:17:14 +0200
commitc04afd6433cd53acdc727ad760cde9c40090030b (patch)
tree1799bca2200a41b843d0d7e67efb2246049ceee5 /src/southbridge/amd/sb700/lpc.c
parentdcb688e5ec88ac1d168509fa757c4665ef335ad4 (diff)
downloadcoreboot-c04afd6433cd53acdc727ad760cde9c40090030b.tar.xz
CBMEM: Add cbmem_locate_table()
For both romstage and ramstage, this calls an arch-specific function get_cbmem_table() to resolve the base and size of CBMEM region. In ramstage, the result is cached as the query may be relatively slow involving multiple PCI configuration reads. For x86 CBMEM tables are located right below top of low ram and have fixed size of HIGH_MEMORY_SIZE in EARLY_CBMEM_INIT implementation. Change-Id: Ie8d16eb30cd5c3860fff243f36bd4e7d8827a782 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3558 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/southbridge/amd/sb700/lpc.c')
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