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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-09-18 19:18:56 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-09-20 17:15:32 +0200 |
| commit | c021ffee45f7b19b3a8e6c426e0d14a4609bf593 (patch) | |
| tree | 6c6a5667ccd217f5272f178271d360947eae1231 /src/southbridge/amd/sb700/reset.c | |
| parent | bf7faa1a634e8bed0d0a8b6634dfe10f42ab986c (diff) | |
| download | coreboot-c021ffee45f7b19b3a8e6c426e0d14a4609bf593.tar.xz | |
southbridge/amd: Add space around operators
Change-Id: I949ff7de072e5e0753d9c8ff0bf98abfca25798b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16637
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/amd/sb700/reset.c')
| -rw-r--r-- | src/southbridge/amd/sb700/reset.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/amd/sb700/reset.c b/src/southbridge/amd/sb700/reset.c index d0cd4a42f0..3c44982e6a 100644 --- a/src/southbridge/amd/sb700/reset.c +++ b/src/southbridge/amd/sb700/reset.c @@ -23,7 +23,7 @@ #define HTIC_BIOSR_Detect (1<<5) #if CONFIG_MAX_PHYSICAL_CPUS > 32 -#define NODE_PCI(x, fn) ((x<32)?(PCI_DEV(CONFIG_CBB,(CONFIG_CDB+x),fn)):(PCI_DEV((CONFIG_CBB-1),(CONFIG_CDB+x-32),fn))) +#define NODE_PCI(x, fn) ((x < 32)?(PCI_DEV(CONFIG_CBB,(CONFIG_CDB+x),fn)):(PCI_DEV((CONFIG_CBB-1),(CONFIG_CDB+x-32),fn))) #else #define NODE_PCI(x, fn) PCI_DEV(CONFIG_CBB,(CONFIG_CDB+x),fn) #endif |