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authorTimothy Pearson <tpearson@raptorengineeringinc.com>2015-11-24 14:11:58 -0600
committerMartin Roth <martinroth@google.com>2016-02-01 22:04:24 +0100
commit51c31696f2fbff988f1de11ca36895f357c3a52a (patch)
tree62fcf86e2346e5884de8355fe756f8403f40c959 /src/southbridge/amd/sb700
parent919c459c17e77c290f77a092c3af3bff38951ab0 (diff)
downloadcoreboot-51c31696f2fbff988f1de11ca36895f357c3a52a.tar.xz
southbridge/amd/sb700: Enable extended APIC ID when Kconfig option set
Change-Id: I52fc2c2294edead3b5dacf397c0a1ab2e08b1e3f Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: https://review.coreboot.org/13160 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge/amd/sb700')
-rw-r--r--src/southbridge/amd/sb700/sm.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/southbridge/amd/sb700/sm.c b/src/southbridge/amd/sb700/sm.c
index 5f6d20e688..6d93b172f1 100644
--- a/src/southbridge/amd/sb700/sm.c
+++ b/src/southbridge/amd/sb700/sm.c
@@ -308,9 +308,11 @@ static void sm_init(device_t dev)
dword |= 0x1;
pci_write_config32(dev, SB_MMIO_CFG_REG, dword);
}
- //ACPI_DISABLE_TIMER_IRQ_ENHANCEMENT_FOR_8254_TIMER
byte = pci_read_config8(dev, 0xAE);
- byte |= 1 << 5;
+ if (IS_ENABLED(CONFIG_ENABLE_APIC_EXT_ID))
+ byte |= 1 << 4;
+ byte |= 1 << 5; /* ACPI_DISABLE_TIMER_IRQ_ENHANCEMENT_FOR_8254_TIMER */
+ byte |= 1 << 6; /* Enable arbiter between APIC and PIC interrupts */
pci_write_config8(dev, 0xAE, byte);
/* 4.11:Programming Cycle Delay for AB and BIF Clock Gating */