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| author | Nico Huber <nico.h@gmx.de> | 2018-11-14 00:00:35 +0100 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2019-01-06 15:54:19 +0000 |
| commit | 9faae2b939d0c83632baeefe80bef1739e125018 (patch) | |
| tree | a3d62f5f14994f1facc2389d189796a836bd8e81 /src/southbridge/amd/sb700 | |
| parent | d2f678d3bd6ca4c05fa5c652d6cdf4623543e576 (diff) | |
| download | coreboot-9faae2b939d0c83632baeefe80bef1739e125018.tar.xz | |
Kconfig: Unify power-after-failure options
The newest and most useful incarnation was hiding in soc/intel/common/.
We move it into the Mainboard menu and extend it with various flags to
be selected to control the default and which options are visible. Also
add a new `int` config MAINBOARD_POWER_FAILURE_STATE that moves the
boolean to int conversion into Kconfig:
0 - S5
1 - S0
2 - previous state
This patch focuses on the Kconfig code. The C code could be unified as
well, e.g. starting with a common enum and safe wrapper around the
get_option() call.
TEST=Did what-jenkins-does with and without this commit and compared
binaries. Nothing changed for the default configurations.
Change-Id: I61259f864c8a8cfc7099cc2699059f972fa056c0
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/29680
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/southbridge/amd/sb700')
| -rw-r--r-- | src/southbridge/amd/sb700/Kconfig | 2 | ||||
| -rw-r--r-- | src/southbridge/amd/sb700/sm.c | 8 |
2 files changed, 4 insertions, 6 deletions
diff --git a/src/southbridge/amd/sb700/Kconfig b/src/southbridge/amd/sb700/Kconfig index 6d62e67d37..58dc75a5de 100644 --- a/src/southbridge/amd/sb700/Kconfig +++ b/src/southbridge/amd/sb700/Kconfig @@ -23,6 +23,8 @@ config SOUTHBRIDGE_SPECIFIC_OPTIONS # dummy select IOAPIC select HAVE_USBDEBUG_OPTIONS select SMBUS_HAS_AUX_CHANNELS + select HAVE_POWER_STATE_AFTER_FAILURE + select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE config SOUTHBRIDGE_AMD_SB700_33MHZ_SPI bool "Enable high speed SPI clock" diff --git a/src/southbridge/amd/sb700/sm.c b/src/southbridge/amd/sb700/sm.c index 64c6db3072..4c3992d8d5 100644 --- a/src/southbridge/amd/sb700/sm.c +++ b/src/southbridge/amd/sb700/sm.c @@ -44,10 +44,6 @@ enum power_mode { POWER_MODE_LAST = 2, }; -#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL -#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL POWER_MODE_ON -#endif - static const char *power_mode_names[] = { [POWER_MODE_OFF] = "off", [POWER_MODE_ON] = "on", @@ -152,11 +148,11 @@ static void sm_init(struct device *dev) pm_iowrite(0x53, byte); /* power after power fail */ - power_state = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL; + power_state = CONFIG_MAINBOARD_POWER_FAILURE_STATE; get_option(&power_state, "power_on_after_fail"); if (power_state > 2) { printk(BIOS_WARNING, "Invalid power_on_after_fail setting, using default\n"); - power_state = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL; + power_state = CONFIG_MAINBOARD_POWER_FAILURE_STATE; } byte = pm_ioread(0x74); byte &= ~0x03; |