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authorMartin Roth <martin.roth@se-eng.com>2014-12-16 20:51:31 -0700
committerMartin Roth <gaumless@gmail.com>2014-12-17 16:55:09 +0100
commitdcf253c74e3eb88e738f425c9a9bfd897736c2b0 (patch)
tree1105c445f31f3e11db2ec7444b840783c1ded1a4 /src/southbridge/amd/sb700
parente9c1b211917b357f4646c8afda94f030c2e10d55 (diff)
downloadcoreboot-dcf253c74e3eb88e738f425c9a9bfd897736c2b0.tar.xz
southbridge/amd sb600, sb700 & sb900 spelling fixes
Trivial fixes, but the editor highlights them, and it's easy to go through a bunch of files while I'm otherwise idle. Change-Id: I31333742d9c90cf6d7ae3d2f324880ed53807d7f Signed-off-by: Martin Roth <martin.roth@se-eng.com> Reviewed-on: http://review.coreboot.org/7840 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/southbridge/amd/sb700')
-rw-r--r--src/southbridge/amd/sb700/early_setup.c8
-rw-r--r--src/southbridge/amd/sb700/fadt.c4
-rw-r--r--src/southbridge/amd/sb700/hda.c2
-rw-r--r--src/southbridge/amd/sb700/lpc.c2
-rw-r--r--src/southbridge/amd/sb700/sata.c2
-rw-r--r--src/southbridge/amd/sb700/sm.c2
-rw-r--r--src/southbridge/amd/sb700/smbus.c2
7 files changed, 11 insertions, 11 deletions
diff --git a/src/southbridge/amd/sb700/early_setup.c b/src/southbridge/amd/sb700/early_setup.c
index ae329129de..82d51e6053 100644
--- a/src/southbridge/amd/sb700/early_setup.c
+++ b/src/southbridge/amd/sb700/early_setup.c
@@ -252,7 +252,7 @@ void enable_fid_change_on_sb(u32 sbbusn, u32 sbdn)
byte |= 0x20;
pmio_write(0x8f, byte);
- pmio_write(0x8b, 0x01); /* TODO: if the HT Link is 200 MHz, it is 0x0A. It doesnt often happen. */
+ pmio_write(0x8b, 0x01); /* TODO: if the HT Link is 200 MHz, it is 0x0A. It doesn't often happen. */
pmio_write(0x8a, 0x90);
pmio_write(0x88, 0x10);
@@ -374,7 +374,7 @@ static void sb700_devices_por_init(void)
/* sbPorAtStartOfTblCfg */
/* Set A-Link bridge access address. This address is set at device 14h, function 0, register 0xf0.
- * This is an I/O address. The I/O address must be on 16-byte boundry. */
+ * This is an I/O address. The I/O address must be on 16-byte boundary. */
pci_write_config32(dev, 0xf0, AB_INDX);
/* To enable AB/BIF DMA access, a specific register inside the BIF register space needs to be configured first. */
@@ -476,7 +476,7 @@ static void sb700_devices_por_init(void)
pci_write_config8(dev, 0x49, 0xFF);
/* Enable 0x480-0x4bf, 0x4700-0x470B */
byte = pci_read_config8(dev, 0x4A);
- byte |= ((1 << 1) + (1 << 6)); /*0x42, save the configuraion for port 0x80. */
+ byte |= ((1 << 1) + (1 << 6)); /*0x42, save the configuration for port 0x80. */
pci_write_config8(dev, 0x4A, byte);
/* Enable Tpm12_en and Tpm_legacy. I don't know what is its usage and copied from CIM. */
@@ -490,7 +490,7 @@ static void sb700_devices_por_init(void)
/* Arbiter enable. */
pci_write_config8(dev, 0x43, 0xff);
- /* Set PCDMA request into hight priority list. */
+ /* Set PCDMA request into height priority list. */
/* pci_write_config8(dev, 0x49, 0x1) */ ;
pci_write_config8(dev, 0x40, 0x26);
diff --git a/src/southbridge/amd/sb700/fadt.c b/src/southbridge/amd/sb700/fadt.c
index 2a61fae1ab..13e9d3baf5 100644
--- a/src/southbridge/amd/sb700/fadt.c
+++ b/src/southbridge/amd/sb700/fadt.c
@@ -62,7 +62,7 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
fadt->pm2_cnt_blk = ACPI_PMA_CNT_BLK;
fadt->pm_tmr_blk = ACPI_PM_TMR_BLK;
fadt->gpe0_blk = ACPI_GPE0_BLK;
- fadt->gpe1_blk = 0x0000; /* we dont have gpe1 block, do we? */
+ fadt->gpe1_blk = 0x0000; /* we don't have gpe1 block, do we? */
fadt->pm1_evt_len = 4;
fadt->pm1_cnt_len = 2;
@@ -81,7 +81,7 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
fadt->duty_width = 3;
fadt->day_alrm = 0; /* 0x7d these have to be */
fadt->mon_alrm = 0; /* 0x7e added to cmos.layout */
- fadt->century = 0; /* 0x7f to make rtc alrm work */
+ fadt->century = 0; /* 0x7f to make rtc alarm work */
fadt->iapc_boot_arch = 0x3; /* See table 5-11 */
fadt->flags = 0x0001c1a5;/* 0x25; */
diff --git a/src/southbridge/amd/sb700/hda.c b/src/southbridge/amd/sb700/hda.c
index 61cc5859d8..308b08cc32 100644
--- a/src/southbridge/amd/sb700/hda.c
+++ b/src/southbridge/amd/sb700/hda.c
@@ -53,7 +53,7 @@ static int set_bits(u32 port, u32 mask, u32 val)
dword &= mask;
} while ((dword != val) && --count);
- /* Timeout occured */
+ /* Timeout occurred */
if (!count)
return -1;
return 0;
diff --git a/src/southbridge/amd/sb700/lpc.c b/src/southbridge/amd/sb700/lpc.c
index 173de8369f..26478b7e0a 100644
--- a/src/southbridge/amd/sb700/lpc.c
+++ b/src/southbridge/amd/sb700/lpc.c
@@ -140,7 +140,7 @@ static void sb700_lpc_set_resources(struct device *dev)
pci_dev_set_resources(dev);
- /* Specical case. SPI Base Address. The SpiRomEnable should be set. */
+ /* Special case. SPI Base Address. The SpiRomEnable should be set. */
res = find_resource(dev, 0xA0);
pci_write_config32(dev, 0xA0, res->base | 1 << 1);
}
diff --git a/src/southbridge/amd/sb700/sata.c b/src/southbridge/amd/sb700/sata.c
index c0e3c0f6aa..7fa924b8a3 100644
--- a/src/southbridge/amd/sb700/sata.c
+++ b/src/southbridge/amd/sb700/sata.c
@@ -38,7 +38,7 @@ static int sata_drive_detect(int portnum, u16 iobar)
if (byte != (0xA0 + 0x10 * (portnum % 2))) {
/* This will happen at the first iteration of this loop
* if the first SATA port is unpopulated and the
- * second SATA port is poulated.
+ * second SATA port is populated.
*/
printk(BIOS_DEBUG, "drive no longer selected after %i ms, "
"retrying init\n", i * 10);
diff --git a/src/southbridge/amd/sb700/sm.c b/src/southbridge/amd/sb700/sm.c
index 8bb5378ff7..5aa4eb102d 100644
--- a/src/southbridge/amd/sb700/sm.c
+++ b/src/southbridge/amd/sb700/sm.c
@@ -181,7 +181,7 @@ static void sm_init(device_t dev)
if ((REV_SB700_A11 == rev) || REV_SB700_A12 == rev) {
byte |= 1 << 0;
}
- /*Set bit2 to 1, enable Io port 60h read/wrire SMi trapping and
+ /*Set bit2 to 1, enable Io port 60h read/write SMi trapping and
*Io port 64h write Smi trapping. conflict with ps2 keyboard
*/
//byte |= 1 << 2 | 1 << 3 | 1 << 4;
diff --git a/src/southbridge/amd/sb700/smbus.c b/src/southbridge/amd/sb700/smbus.c
index 46dad41c0a..9e3844df0d 100644
--- a/src/southbridge/amd/sb700/smbus.c
+++ b/src/southbridge/amd/sb700/smbus.c
@@ -38,7 +38,7 @@ void alink_ab_indx(u32 reg_space, u32 reg_addr, u32 mask, u32 val)
tmp |= val;
/* printk(BIOS_DEBUG, "about write %x, index=%x", tmp, (reg_space&0x3)<<30 | reg_addr); */
- outl((reg_space & 0x3) << 30 | reg_addr, AB_INDX); /* probably we dont have to do it again. */
+ outl((reg_space & 0x3) << 30 | reg_addr, AB_INDX); /* probably we don't have to do it again. */
outl(tmp, AB_DATA);
reg_addr & 0x10000 ? outl(0, AB_INDX) : NULL;
}