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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-19 08:29:41 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-26 02:08:42 +0000 |
commit | c99d3afe3e78565937c215f882bd4b7fc586f66e (patch) | |
tree | 4883a3ae5d65c369c5c85abae73cc1946f0a2c76 /src/southbridge/amd/sb700 | |
parent | 1e02d73c73f6f59f66c198b8c2afe77b0a730b01 (diff) | |
download | coreboot-c99d3afe3e78565937c215f882bd4b7fc586f66e.tar.xz |
amdfam10: Remove use of __PRE_RAM__
Change-Id: I4215b27332034a3c07052db92e4abae55c3fe967
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34930
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/southbridge/amd/sb700')
-rw-r--r-- | src/southbridge/amd/sb700/ide.c | 1 | ||||
-rw-r--r-- | src/southbridge/amd/sb700/sb700.c | 1 | ||||
-rw-r--r-- | src/southbridge/amd/sb700/sb700.h | 30 |
3 files changed, 14 insertions, 18 deletions
diff --git a/src/southbridge/amd/sb700/ide.c b/src/southbridge/amd/sb700/ide.c index 0b11db3c86..070ee67d9c 100644 --- a/src/southbridge/amd/sb700/ide.c +++ b/src/southbridge/amd/sb700/ide.c @@ -22,6 +22,7 @@ #include <types.h> #include "sb700.h" +#include "chip.h" static void ide_init(struct device *dev) { diff --git a/src/southbridge/amd/sb700/sb700.c b/src/southbridge/amd/sb700/sb700.c index 1836f34eb0..1eaf347dcc 100644 --- a/src/southbridge/amd/sb700/sb700.c +++ b/src/southbridge/amd/sb700/sb700.c @@ -22,6 +22,7 @@ #include <device/pci_ids.h> #include <device/pci_ops.h> #include "sb700.h" +#include "chip.h" static struct device *find_sm_dev(struct device *dev, u32 devfn) { diff --git a/src/southbridge/amd/sb700/sb700.h b/src/southbridge/amd/sb700/sb700.h index 156522e579..4b863a0778 100644 --- a/src/southbridge/amd/sb700/sb700.h +++ b/src/southbridge/amd/sb700/sb700.h @@ -17,7 +17,8 @@ #ifndef SB700_H #define SB700_H -#include "chip.h" +#include <types.h> +#include <device/device.h> /* Power management index/data registers */ #define BIOSRAM_INDEX 0xcd4 @@ -37,14 +38,12 @@ #define ACPI_CPU_CONTROL (SB700_ACPI_IO_BASE + 0x08) /* 6 bytes */ #define ACPI_CPU_P_LVL2 (ACPI_CPU_CONTROL + 0x4) /* 1 byte */ -extern void pm_iowrite(u8 reg, u8 value); -extern u8 pm_ioread(u8 reg); -extern void pm2_iowrite(u8 reg, u8 value); -extern u8 pm2_ioread(u8 reg); -#ifndef __SIMPLE_DEVICE__ -extern void set_sm_enable_bits(struct device *sm_dev, u32 reg_pos, u32 mask, - u32 val); -#endif +void pm_iowrite(u8 reg, u8 value); +u8 pm_ioread(u8 reg); +void pm2_iowrite(u8 reg, u8 value); +u8 pm2_ioread(u8 reg); + +void set_sm_enable_bits(struct device *sm_dev, u32 reg_pos, u32 mask, u32 val); #define REV_SB700_A11 0x11 #define REV_SB700_A12 0x12 @@ -58,11 +57,7 @@ extern void set_sm_enable_bits(struct device *sm_dev, u32 reg_pos, u32 mask, * The differentiate is 0x28, isn't it? */ #define get_sb700_revision(sm_dev) (pci_read_config8((sm_dev), 0x08) - 0x28) -#ifndef __SIMPLE_DEVICE__ -void sb7xx_51xx_enable(struct device *dev); -#endif -#ifdef __PRE_RAM__ void sb7xx_51xx_lpc_port80(void); void sb7xx_51xx_pci_port80(void); void sb7xx_51xx_lpc_init(void); @@ -71,14 +66,12 @@ void sb7xx_51xx_disable_wideio(u8 wio_index); void sb7xx_51xx_early_setup(void); void sb7xx_51xx_before_pci_init(void); uint16_t sb7xx_51xx_decode_last_reset(void); -#else -#include <device/pci.h> -#include <device/pci_ops.h> + + /* allow override in mainboard.c */ void sb7xx_51xx_setup_sata_phys(struct device *dev); void sb7xx_51xx_setup_sata_port_indication(void *sata_bar5); - -#endif +void sb7xx_51xx_enable(struct device *dev); void set_lpc_sticky_ctl(bool enable); @@ -86,4 +79,5 @@ int s3_save_nvram_early(u32 dword, int size, int nvram_pos); int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos); void enable_fid_change_on_sb(u32 sbbusn, u32 sbdn); + #endif /* SB700_H */ |