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authorNico Huber <nico.h@gmx.de>2018-10-07 12:12:27 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-10-22 08:40:28 +0000
commite20dd19dde6ab887a71b084fa342a8c46488568e (patch)
tree72ced1c9a85cdf77b72e4d9ba9fca3ac495e6a6a /src/southbridge/amd/sb700
parentf4181052afd38aa7856762ff22f55ed1cdd835a9 (diff)
downloadcoreboot-e20dd19dde6ab887a71b084fa342a8c46488568e.tar.xz
amdfam10: Convert to `board_reset()`
And here comes the mess... This just renames do_hard_reset() to do_board_reset() and keeps current behaviour. As these are never called from chipset or board code but only from common code, it's likely that their implementations are untested and not what we actually want. Also note, that sometimes implementations for rom- and ramstage differ considerably. Change-Id: Icdf55ed1a0e0294933f61749a37da2ced01da61c Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/29058 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/amd/sb700')
-rw-r--r--src/southbridge/amd/sb700/Kconfig1
-rw-r--r--src/southbridge/amd/sb700/reset.c2
2 files changed, 1 insertions, 2 deletions
diff --git a/src/southbridge/amd/sb700/Kconfig b/src/southbridge/amd/sb700/Kconfig
index 353c2a46c7..6d62e67d37 100644
--- a/src/southbridge/amd/sb700/Kconfig
+++ b/src/southbridge/amd/sb700/Kconfig
@@ -22,7 +22,6 @@ config SOUTHBRIDGE_SPECIFIC_OPTIONS # dummy
def_bool y
select IOAPIC
select HAVE_USBDEBUG_OPTIONS
- select HAVE_HARD_RESET
select SMBUS_HAS_AUX_CHANNELS
config SOUTHBRIDGE_AMD_SB700_33MHZ_SPI
diff --git a/src/southbridge/amd/sb700/reset.c b/src/southbridge/amd/sb700/reset.c
index 08780399b1..f5f7a2c2f3 100644
--- a/src/southbridge/amd/sb700/reset.c
+++ b/src/southbridge/amd/sb700/reset.c
@@ -44,7 +44,7 @@ static void set_bios_reset(void)
}
}
-void do_hard_reset(void)
+void do_board_reset(void)
{
set_bios_reset();