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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-03-01 13:43:02 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-03-01 20:32:15 +0000
commitf1b58b78351d7ed220673e688a2f7bc9e96da4e2 (patch)
treed8aae223f0e426f189cb4750b972a31e09d46b88 /src/southbridge/amd/sb700
parent44e89af6e609874f2f18d30f1e66dce8b5a98eff (diff)
downloadcoreboot-f1b58b78351d7ed220673e688a2f7bc9e96da4e2.tar.xz
device/pci: Fix PCI accessor headers
PCI config accessors are no longer indirectly included from <arch/io.h> use <device/pci_ops.h> instead. Change-Id: I2adf46430a33bc52ef69d1bf7dca4655fc8475bd Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/31675 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/southbridge/amd/sb700')
-rw-r--r--src/southbridge/amd/sb700/bootblock.c1
-rw-r--r--src/southbridge/amd/sb700/early_setup.c1
-rw-r--r--src/southbridge/amd/sb700/reset.c1
-rw-r--r--src/southbridge/amd/sb700/sb700.h1
4 files changed, 4 insertions, 0 deletions
diff --git a/src/southbridge/amd/sb700/bootblock.c b/src/southbridge/amd/sb700/bootblock.c
index 364fa01c51..ed6f2561f5 100644
--- a/src/southbridge/amd/sb700/bootblock.c
+++ b/src/southbridge/amd/sb700/bootblock.c
@@ -16,6 +16,7 @@
#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#define IO_MEM_PORT_DECODE_ENABLE_5 0x48
#define IO_MEM_PORT_DECODE_ENABLE_6 0x4a
diff --git a/src/southbridge/amd/sb700/early_setup.c b/src/southbridge/amd/sb700/early_setup.c
index 167986fa67..af2b6c1bce 100644
--- a/src/southbridge/amd/sb700/early_setup.c
+++ b/src/southbridge/amd/sb700/early_setup.c
@@ -20,6 +20,7 @@
#include <stdint.h>
#include <option.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/msr.h>
#include <device/pci.h>
diff --git a/src/southbridge/amd/sb700/reset.c b/src/southbridge/amd/sb700/reset.c
index 4c9b0f4056..9a04459799 100644
--- a/src/southbridge/amd/sb700/reset.c
+++ b/src/southbridge/amd/sb700/reset.c
@@ -17,6 +17,7 @@
#define __SIMPLE_DEVICE__
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <reset.h>
#include <southbridge/amd/common/reset.h>
diff --git a/src/southbridge/amd/sb700/sb700.h b/src/southbridge/amd/sb700/sb700.h
index 0b638f65c4..156522e579 100644
--- a/src/southbridge/amd/sb700/sb700.h
+++ b/src/southbridge/amd/sb700/sb700.h
@@ -73,6 +73,7 @@ void sb7xx_51xx_before_pci_init(void);
uint16_t sb7xx_51xx_decode_last_reset(void);
#else
#include <device/pci.h>
+#include <device/pci_ops.h>
/* allow override in mainboard.c */
void sb7xx_51xx_setup_sata_phys(struct device *dev);
void sb7xx_51xx_setup_sata_port_indication(void *sata_bar5);