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| author | Zheng Bao <zheng.bao@amd.com> | 2011-01-27 03:31:50 +0000 |
|---|---|---|
| committer | Zheng Bao <Zheng.Bao@amd.com> | 2011-01-27 03:31:50 +0000 |
| commit | a5c949eff288af3eb4caffec57a3724c497150de (patch) | |
| tree | b3dc0071a4dd843044fcb5a7861406c2fd13a6b0 /src/southbridge/amd/sb700 | |
| parent | 066cbe0cb7275a41216ab51a67bb596257202a30 (diff) | |
| download | coreboot-a5c949eff288af3eb4caffec57a3724c497150de.tar.xz | |
Trivial. Re-indent the code.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Zheng Bao <zheng.bao@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6301 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd/sb700')
| -rw-r--r-- | src/southbridge/amd/sb700/early_setup.c | 15 | ||||
| -rw-r--r-- | src/southbridge/amd/sb700/lpc.c | 3 | ||||
| -rw-r--r-- | src/southbridge/amd/sb700/sata.c | 6 |
3 files changed, 15 insertions, 9 deletions
diff --git a/src/southbridge/amd/sb700/early_setup.c b/src/southbridge/amd/sb700/early_setup.c index 505632ec76..cd5221742b 100644 --- a/src/southbridge/amd/sb700/early_setup.c +++ b/src/southbridge/amd/sb700/early_setup.c @@ -41,7 +41,8 @@ static u8 pmio_read(u8 reg) return inb(PM_INDEX + 1); } -static void sb700_acpi_init(void) { +static void sb700_acpi_init(void) +{ pmio_write(0x20, ACPI_PM_EVT_BLK & 0xFF); pmio_write(0x21, ACPI_PM_EVT_BLK >> 8); pmio_write(0x22, ACPI_PM1_CNT_BLK & 0xFF); @@ -624,7 +625,8 @@ static int smbus_read_byte(u32 device, u32 address) return do_smbus_read_byte(SMBUS_IO_BASE, device, address); } -int s3_save_nvram_early(u32 dword, int size, int nvram_pos) { +int s3_save_nvram_early(u32 dword, int size, int nvram_pos) +{ int i; printk(BIOS_DEBUG, "Writing %x of size %d to nvram pos: %d\n", dword, size, nvram_pos); @@ -637,7 +639,8 @@ int s3_save_nvram_early(u32 dword, int size, int nvram_pos) { return nvram_pos; } -int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos) { +int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos) +{ u32 data = *old_dword; int i; for (i = 0; i<size; i++) { @@ -653,7 +656,8 @@ int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos) { } #if CONFIG_HAVE_ACPI_RESUME == 1 -static int acpi_is_wakeup_early(void) { +static int acpi_is_wakeup_early(void) +{ u16 tmp; tmp = inw(ACPI_PM1_CNT_BLK); printk(BIOS_DEBUG, "IN TEST WAKEUP %x\n", tmp); @@ -661,7 +665,8 @@ static int acpi_is_wakeup_early(void) { } #endif -struct cbmem_entry *get_cbmem_toc(void) { +struct cbmem_entry *get_cbmem_toc(void) +{ uint32_t xdata = 0; int xnvram_pos = 0xfc, xi; for (xi = 0; xi<4; xi++) { diff --git a/src/southbridge/amd/sb700/lpc.c b/src/southbridge/amd/sb700/lpc.c index c073230821..a08780e521 100644 --- a/src/southbridge/amd/sb700/lpc.c +++ b/src/southbridge/amd/sb700/lpc.c @@ -77,7 +77,8 @@ static void lpc_init(device_t dev) #endif } -void set_cbmem_toc(struct cbmem_entry *toc) { +void set_cbmem_toc(struct cbmem_entry *toc) +{ u32 dword = (u32) toc; int nvram_pos = 0xfc, i; for (i = 0; i<4; i++) { diff --git a/src/southbridge/amd/sb700/sata.c b/src/southbridge/amd/sb700/sata.c index 08b9aa8ad9..1ad9bdd9df 100644 --- a/src/southbridge/amd/sb700/sata.c +++ b/src/southbridge/amd/sb700/sata.c @@ -53,9 +53,9 @@ static int sata_drive_detect(int portnum, u16 iobar) return 0; } - /* This function can be overloaded in mainboard.c */ - -void __attribute__((weak)) sb700_setup_sata_phys(struct device *dev) { +/* This function can be overloaded in mainboard.c */ +void __attribute__((weak)) sb700_setup_sata_phys(struct device *dev) +{ /* RPR7.6.1 Program the PHY Global Control to 0x2C00 */ pci_write_config16(dev, 0x86, 0x2c00); |