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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-10-17 10:56:26 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-10-23 15:52:09 +0000 |
| commit | a342f3937e7ce159fd170ab8cd26ba799a3bc9e4 (patch) | |
| tree | 4bd4540ba11286f465272c1fbee62dbf5f9789f8 /src/southbridge/amd/sb800 | |
| parent | 9856892297ad997f586a1b4dd0a494f3764a0ce2 (diff) | |
| download | coreboot-a342f3937e7ce159fd170ab8cd26ba799a3bc9e4.tar.xz | |
src: Remove unneeded whitespace
Change-Id: I6c77f4289b46646872731ef9c20dc115f0cf876d
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/29161
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge/amd/sb800')
| -rw-r--r-- | src/southbridge/amd/sb800/early_setup.c | 2 | ||||
| -rw-r--r-- | src/southbridge/amd/sb800/sata.c | 8 | ||||
| -rw-r--r-- | src/southbridge/amd/sb800/sm.c | 4 | ||||
| -rw-r--r-- | src/southbridge/amd/sb800/smbus.c | 2 |
4 files changed, 8 insertions, 8 deletions
diff --git a/src/southbridge/amd/sb800/early_setup.c b/src/southbridge/amd/sb800/early_setup.c index d73b75d391..2ace9926c7 100644 --- a/src/southbridge/amd/sb800/early_setup.c +++ b/src/southbridge/amd/sb800/early_setup.c @@ -633,7 +633,7 @@ int s3_save_nvram_early(u32 dword, int size, int nvram_pos) for (i = 0; i < size; i++) { outb(nvram_pos, BIOSRAM_INDEX); - outb((dword >>(8 * i)) & 0xff , BIOSRAM_DATA); + outb((dword >> (8 * i)) & 0xff, BIOSRAM_DATA); nvram_pos++; } diff --git a/src/southbridge/amd/sb800/sata.c b/src/southbridge/amd/sb800/sata.c index 15b2527434..2186d37a41 100644 --- a/src/southbridge/amd/sb800/sata.c +++ b/src/southbridge/amd/sb800/sata.c @@ -177,7 +177,7 @@ static void sata_init(struct device *dev) byte = read8(sata_bar5 + 0x128 + 0x80 * i); printk(BIOS_SPEW, "SATA port %i status = %x\n", i, byte); byte &= 0xF; - if ( byte == 0x1 ) { + if (byte == 0x1) { /* If the drive status is 0x1 then we see it but we aren't talking to it. */ /* Try to do something about it. */ printk(BIOS_SPEW, "SATA device detected but not talking. Trying lower speed.\n"); @@ -212,13 +212,13 @@ static void sata_init(struct device *dev) } printk(BIOS_DEBUG, "%s %s device is %sready after %i tries\n", (i / 2) ? "Secondary" : "Primary", - (i % 2 ) ? "Slave" : "Master", + (i % 2) ? "Slave" : "Master", (j == 10) ? "not " : "", (j == 10) ? j : j + 1); } else { printk(BIOS_DEBUG, "No %s %s SATA drive on Slot%i\n", (i / 2) ? "Secondary" : "Primary", - (i % 2 ) ? "Slave" : "Master", i); + (i % 2) ? "Slave" : "Master", i); } } @@ -237,7 +237,7 @@ static void sata_init(struct device *dev) write32((sata_bar5 + 0x3b0), 0xFFFFFFFF); /* Clear SATA status,Firstly we get the AcpiGpe0BlkAddr */ - /* ????? why CIM does not set the AcpiGpe0BlkAddr , but use it??? */ + /* ????? why CIM does not set the AcpiGpe0BlkAddr, but use it??? */ /* word = 0x0000; */ /* word = pm_ioread(0x28); */ diff --git a/src/southbridge/amd/sb800/sm.c b/src/southbridge/amd/sb800/sm.c index d4ed3ccbe8..fdb6283fb0 100644 --- a/src/southbridge/amd/sb800/sm.c +++ b/src/southbridge/amd/sb800/sm.c @@ -45,8 +45,8 @@ #define BIT6 (1 << 6) #define BIT7 (1 << 7) -#define BIT8 (1 << 8 ) -#define BIT9 (1 << 9 ) +#define BIT8 (1 << 8) +#define BIT9 (1 << 9) #define BIT10 (1 << 10) #define BIT11 (1 << 11) #define BIT12 (1 << 12) diff --git a/src/southbridge/amd/sb800/smbus.c b/src/southbridge/amd/sb800/smbus.c index 89244f4c4c..aa4133b92a 100644 --- a/src/southbridge/amd/sb800/smbus.c +++ b/src/southbridge/amd/sb800/smbus.c @@ -222,7 +222,7 @@ void alink_rc_indx(u32 reg_space, u32 reg_addr, u32 port, /* space = 0: AX_INDXC, AX_DATAC * space = 1: AX_INDXP, AX_DATAP */ -void alink_ax_indx(u32 space /*c or p? */ , u32 axindc, +void alink_ax_indx(u32 space /*c or p? */, u32 axindc, u32 mask, u32 val) { u32 tmp; |