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authorTimothy Pearson <tpearson@raptorengineeringinc.com>2015-08-14 15:20:42 -0500
committerMartin Roth <martinroth@google.com>2015-12-18 19:51:44 +0100
commit1eaaa0e446b88e0ad60c4b6f68a022a9184f1df8 (patch)
tree05ec93f8500e92ee6f0bed893e2e994957ed8173 /src/southbridge/amd/sr5650/Kconfig
parent5f2bf6d02ddb82887a17c0b48ce8eb3a300f9c09 (diff)
downloadcoreboot-1eaaa0e446b88e0ad60c4b6f68a022a9184f1df8.tar.xz
southbridge/amd/sr5650: Add MCFG ACPI table support
As the southbridge largely controls the PCI[e] configuration space this patch moves the resource allocation from the northbridge to the southbridge when the extended configuration space region is enabled. Change-Id: I0c4ba74ddcc727cd92b848d5d3240e6f9f392101 Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: https://review.coreboot.org/12050 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Diffstat (limited to 'src/southbridge/amd/sr5650/Kconfig')
-rw-r--r--src/southbridge/amd/sr5650/Kconfig9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/southbridge/amd/sr5650/Kconfig b/src/southbridge/amd/sr5650/Kconfig
index 29017c612e..85f6b13013 100644
--- a/src/southbridge/amd/sr5650/Kconfig
+++ b/src/southbridge/amd/sr5650/Kconfig
@@ -15,3 +15,12 @@
config SOUTHBRIDGE_AMD_SR5650
bool
+
+if SOUTHBRIDGE_AMD_SR5650
+config EXT_CONF_SUPPORT
+ bool "Enable PCI-E MMCONFIG support"
+ default y
+ help
+ Select to enable PCI-E MMCONFIG support on the SR5650.
+
+endif