diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-12-12 15:11:01 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-12-19 05:23:03 +0000 |
| commit | 19ea62e19dabdaef4032ab40e7ff9b2ac79d9b81 (patch) | |
| tree | 0b648ef8b0eb30211a2859af3b5b1c26f5b4de9c /src/southbridge/amd/sr5650 | |
| parent | 17115156b04d75325ffb0f4818fcd31cecc8eb9b (diff) | |
| download | coreboot-19ea62e19dabdaef4032ab40e7ff9b2ac79d9b81.tar.xz | |
southbridge: Remove useless include <device/pci_ids.h>
Change-Id: Ia640131479d4221ccd84613033f28de3932b8bff
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/30120
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/southbridge/amd/sr5650')
| -rw-r--r-- | src/southbridge/amd/sr5650/pcie.c | 1 | ||||
| -rw-r--r-- | src/southbridge/amd/sr5650/sr5650.h | 1 |
2 files changed, 0 insertions, 2 deletions
diff --git a/src/southbridge/amd/sr5650/pcie.c b/src/southbridge/amd/sr5650/pcie.c index 159f3e43eb..f2fd5392fc 100644 --- a/src/southbridge/amd/sr5650/pcie.c +++ b/src/southbridge/amd/sr5650/pcie.c @@ -17,7 +17,6 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <device/pci_ops.h> #include <delay.h> #include "sr5650.h" diff --git a/src/southbridge/amd/sr5650/sr5650.h b/src/southbridge/amd/sr5650/sr5650.h index 2e6b728495..06a427987d 100644 --- a/src/southbridge/amd/sr5650/sr5650.h +++ b/src/southbridge/amd/sr5650/sr5650.h @@ -19,7 +19,6 @@ #include <stdint.h> #include <arch/acpi.h> -#include <device/pci_ids.h> #include "chip.h" #include "rev.h" |