diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-05-22 02:18:00 +0300 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2019-01-06 01:17:54 +0000 |
| commit | c70eed1e6202c928803f3e7f79161cd247a62b23 (patch) | |
| tree | e46a6c87f6f13b7719fd40a9360d8d03359bfffb /src/southbridge/amd/sr5650 | |
| parent | 54efaae701dacd58621e66a8cf56812eb5304946 (diff) | |
| download | coreboot-c70eed1e6202c928803f3e7f79161cd247a62b23.tar.xz | |
device: Use pcidev_on_root()
Change-Id: Icf34b39d80f6e46d32a39b68f38fb2752c0bcebc
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/26484
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Piotr Król <piotr.krol@3mdeb.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge/amd/sr5650')
| -rw-r--r-- | src/southbridge/amd/sr5650/ht.c | 4 | ||||
| -rw-r--r-- | src/southbridge/amd/sr5650/pcie.c | 2 | ||||
| -rw-r--r-- | src/southbridge/amd/sr5650/sr5650.c | 14 |
3 files changed, 10 insertions, 10 deletions
diff --git a/src/southbridge/amd/sr5650/ht.c b/src/southbridge/amd/sr5650/ht.c index 1b4c99bc6f..f8db2b8c6d 100644 --- a/src/southbridge/amd/sr5650/ht.c +++ b/src/southbridge/amd/sr5650/ht.c @@ -187,8 +187,8 @@ static void sr5690_set_resources(struct device *dev) printk(BIOS_DEBUG,"%s %s\n", dev_path(dev), __func__); /* Find requisite AMD CPU devices */ - amd_ht_cfg_dev = dev_find_slot(0, PCI_DEVFN(0x18, 0)); - amd_addr_map_dev = dev_find_slot(0, PCI_DEVFN(0x18, 1)); + amd_ht_cfg_dev = pcidev_on_root(0x18, 0); + amd_addr_map_dev = pcidev_on_root(0x18, 1); if (!amd_ht_cfg_dev || !amd_addr_map_dev) { printk(BIOS_WARNING, "%s: %s Unable to locate CPU control devices\n", __func__, dev_path(dev)); diff --git a/src/southbridge/amd/sr5650/pcie.c b/src/southbridge/amd/sr5650/pcie.c index 5084a122ce..9d4c689759 100644 --- a/src/southbridge/amd/sr5650/pcie.c +++ b/src/southbridge/amd/sr5650/pcie.c @@ -843,7 +843,7 @@ static void lock_hwinitreg(struct device *nb_dev) */ void sr56x0_lock_hwinitreg(void) { - struct device *nb_dev = dev_find_slot(0, PCI_DEVFN(0, 0)); + struct device *nb_dev = pcidev_on_root(0, 0); /* Lock HWInit Register */ lock_hwinitreg(nb_dev); diff --git a/src/southbridge/amd/sr5650/sr5650.c b/src/southbridge/amd/sr5650/sr5650.c index 0f8b265781..119e4f3141 100644 --- a/src/southbridge/amd/sr5650/sr5650.c +++ b/src/southbridge/amd/sr5650/sr5650.c @@ -129,8 +129,8 @@ void l1cfg_ind_write_index(struct device *nb_dev, uint32_t index, uint32_t data) void ProgK8TempMmioBase(u8 in_out, u32 pcie_base_add, u32 mmio_base_add) { /* K8 Function1 is address map */ - struct device *k8_f1 = dev_find_slot(0, PCI_DEVFN(0x18, 1)); - struct device *k8_f0 = dev_find_slot(0, PCI_DEVFN(0x18, 0)); + struct device *k8_f1 = pcidev_on_root(0x18, 1); + struct device *k8_f0 = pcidev_on_root(0x18, 0); if (in_out) { u32 dword, sblk; @@ -331,7 +331,7 @@ void detect_and_enable_iommu(struct device *iommu_dev) { if (iommu) { printk(BIOS_DEBUG, "Initializing IOMMU\n"); - struct device *nb_dev = dev_find_slot(0, PCI_DEVFN(0, 0)); + struct device *nb_dev = pcidev_on_root(0, 0); if (!nb_dev) { printk(BIOS_WARNING, "Unable to find SR5690 device! IOMMU NOT initialized\n"); @@ -616,7 +616,7 @@ void sr5650_enable(struct device *dev) struct southbridge_amd_sr5650_config *cfg; printk(BIOS_INFO, "sr5650_enable: dev=%p, VID_DID=0x%x\n", dev, get_vid_did(dev)); - nb_dev = dev_find_slot(0, PCI_DEVFN(0, 0)); + nb_dev = pcidev_on_root(0, 0); if (!nb_dev) { die("sr5650_enable: CAN NOT FIND SR5650 DEVICE, HALT!\n"); /* NOT REACHED */ @@ -624,7 +624,7 @@ void sr5650_enable(struct device *dev) cfg = (struct southbridge_amd_sr5650_config *)nb_dev->chip_info; /* sb_dev (dev 8) is a bridge that links to southbridge. */ - sb_dev = dev_find_slot(0, PCI_DEVFN(8, 0)); + sb_dev = pcidev_on_root(8, 0); if (!sb_dev) { die("sr5650_enable: CAN NOT FIND SB bridge, HALT!\n"); /* NOT REACHED */ @@ -823,14 +823,14 @@ static unsigned long acpi_fill_ivrs(acpi_ivrs_t *ivrs, unsigned long current) { uint8_t *p; - struct device *nb_dev = dev_find_slot(0, PCI_DEVFN(0, 0)); + struct device *nb_dev = pcidev_on_root(0, 0); if (!nb_dev) { printk(BIOS_WARNING, "acpi_fill_ivrs: Unable to locate SR5650 " "device! IVRS table not generated...\n"); return (unsigned long)ivrs; } - struct device *iommu_dev = dev_find_slot(0, PCI_DEVFN(0, 2)); + struct device *iommu_dev = pcidev_on_root(0, 2); if (!iommu_dev) { printk(BIOS_WARNING, "acpi_fill_ivrs: Unable to locate SR5650 " "IOMMU device! IVRS table not generated...\n"); |