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| author | Martin Roth <martinroth@google.com> | 2016-09-06 10:28:22 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-09-07 19:00:32 +0200 |
| commit | d4aa2c434869edffc7d49b9e52ba8c182b8ef69a (patch) | |
| tree | b3e7acbb0d3285fdc8124d0df4e603744b9acac0 /src/southbridge/amd/sr5650 | |
| parent | a66df49e158472c706a9685c6d4644f193999ec9 (diff) | |
| download | coreboot-d4aa2c434869edffc7d49b9e52ba8c182b8ef69a.tar.xz | |
include/arch/acpi.h: change IVRS efr field to iommu_feature_info
The field that was previously named 'efr' is actually the iommu feature
info field. The efr field is a 64-bit field that is only present in
type 11h or type 40h headers that follows the iommu feature info field.
Change-Id: I62c158a258d43bf1912fedd63cc31b80321a27c6
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/16508
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/amd/sr5650')
| -rw-r--r-- | src/southbridge/amd/sr5650/sr5650.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/amd/sr5650/sr5650.c b/src/southbridge/amd/sr5650/sr5650.c index 87845c6d89..853678382b 100644 --- a/src/southbridge/amd/sr5650/sr5650.c +++ b/src/southbridge/amd/sr5650/sr5650.c @@ -860,7 +860,7 @@ static unsigned long acpi_fill_ivrs(acpi_ivrs_t* ivrs, unsigned long current) ivrs->ivhd.pci_segment_group = 0x0; ivrs->ivhd.iommu_info = 0x0; ivrs->ivhd.iommu_info |= (0x14 << 8); - ivrs->ivhd.efr = 0x0; + ivrs->ivhd.iommu_feature_info = 0x0; /* Describe HPET */ p = (uint8_t *)current; |