Add new option 'sata_mode' to CMOS and 'SATA_MODE' to Kconfig for AMD SB600

coreboot used to set the chipset to IDE mode unconditionally.
Now, the user has a couple of ways to choose the configuration:
- If a CMOS variable sata_mode exist, it is used to decide if IDE or
  AHCI is to be used as interface.
- If not, a Kconfig option is used.
- If unchanged, the Kconfig option is set to IDE.

So unless the cmos.layout is extended or Kconfig is modified, this won't
change behaviour.

[Patrick: Compared to Josef's version, I changed the Kconfig option to
be boolean, instead of a magic string. Also, the "IDE" default is
handled in Kconfig, instead of an additional line of code.]

Signed-off-by: Josef Kellermann <seppk@arcor.de>
Acked-by: Patrick Georgi <patrick.georgi@secunet.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6379 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

2 files changed, 42 insertions, 10 deletions

diff --git a/src/southbridge/amd/sb600/Kconfig b/src/southbridge/amd/sb600/Kconfig
index 4e86999fb7..c32318c102 100644
--- a/src/southbridge/amd/sb600/Kconfig
+++ b/src/southbridge/amd/sb600/Kconfig
@@ -23,16 +23,36 @@ config SOUTHBRIDGE_AMD_SB600
 	select HAVE_USBDEBUG
 	select TINY_BOOTBLOCK
 
+if SOUTHBRIDGE_AMD_SB600
 config BOOTBLOCK_SOUTHBRIDGE_INIT
 	string
 	default "southbridge/amd/sb600/bootblock.c"
-	depends on SOUTHBRIDGE_AMD_SB600
 
 config EHCI_BAR
 	hex
-	default 0xfef00000 if SOUTHBRIDGE_AMD_SB600
+	default 0xfef00000
 
 config EHCI_DEBUG_OFFSET
 	hex
-	default 0xe0 if SOUTHBRIDGE_AMD_SB600
+	default 0xe0
 
+choice
+	prompt "SATA Mode"
+	default SATA_MODE_IDE
+	help
+	  Select the mode in which SATA should be driven. IDE or AHCI.
+	  The default is IDE.
+
+	config SATA_MODE_IDE
+	bool "IDE"
+
+	config SATA_MODE_AHCI
+	bool "AHCI"
+endchoice
+
+config SATA_MODE
+	int
+	default 1 if SATA_MODE_IDE
+	default 0 if SATA_MODE_AHCI
+
+endif
diff --git a/src/southbridge/amd/sb600/sata.c b/src/southbridge/amd/sb600/sata.c
index 055e7daa85..7eda2e854c 100644
--- a/src/southbridge/amd/sb600/sata.c
+++ b/src/southbridge/amd/sb600/sata.c
@@ -26,6 +26,10 @@
 #include <device/pci_ops.h>
 #include <arch/io.h>
 #include "sb600.h"
+#include <pc80/mc146818rtc.h>
+
+#define SATA_MODE_IDE 1
+#define SATA_MODE_AHCI 0
 
 static int sata_drive_detect(int portnum, u16 iobar)
 {
@@ -98,10 +102,6 @@ static void sata_init(struct device *dev)
 	printk(BIOS_SPEW, "sata_bar4=%x\n", sata_bar4);	/* 3000 */
 	printk(BIOS_SPEW, "sata_bar5=%x\n", sata_bar5);	/* e0309000 */
 
-	/* Program the 2C to 0x43801002 */
-	dword = 0x43801002;
-	pci_write_config32(dev, 0x2c, dword);
-
 	/* SERR-Enable */
 	word = pci_read_config16(dev, 0x04);
 	word |= (1 << 8);
@@ -112,13 +112,25 @@ static void sata_init(struct device *dev)
 	byte |= (1 << 2);
 	pci_write_config8(dev, 0x40, byte);
 
-	/* Set SATA Operation Mode, Set to IDE mode */
+	/* Set SATA Operation Mode */
 	byte = pci_read_config8(dev, 0x40);
 	byte |= (1 << 0);
 	byte |= (1 << 4);
 	pci_write_config8(dev, 0x40, byte);
 
-	dword = 0x01018f00;
+	// 1 means IDE, 0 means AHCI
+	if( get_option(&i, "sata_mode") < 0 ) {
+		// no cmos option
+		i = CONFIG_SATA_MODE;
+	}
+	printk(BIOS_INFO, "%s: setting sata mode = %s\n", __func__, (i == SATA_MODE_IDE)?"ide":"ahci" );	
+	
+	dword = pci_read_config32(dev, 0x8);
+	dword &= 0xff0000ff;
+	if (i == SATA_MODE_IDE)
+		dword |= 0x00018f00; // IDE mode
+	else
+		dword |= 0x00060100; // AHCI mode
 	pci_write_config32(dev, 0x8, dword);
 
 	byte = pci_read_config8(dev, 0x40);
@@ -245,7 +257,7 @@ static void sata_init(struct device *dev)
 }
 
 static struct pci_operations lops_pci = {
-	/* .set_subsystem = pci_dev_set_subsystem, */
+	.set_subsystem = pci_dev_set_subsystem,
 };
 
 static struct device_operations sata_ops = {