summaryrefslogtreecommitdiff
path: root/src/southbridge/amd
diff options
context:
space:
mode:
authorMarc Jones <marcj303@gmail.com>2016-09-20 20:33:42 -0600
committerMartin Roth <martinroth@google.com>2016-11-07 20:37:42 +0100
commita84fa908e2f8c25b21cb0017ff6bc80ee2d22ff3 (patch)
treedbe9a109d3b9e9807f3760f730f58e3a7c68aa2d /src/southbridge/amd
parent6580408a7e0a19c68f9705884c1bcaf4638cc914 (diff)
downloadcoreboot-a84fa908e2f8c25b21cb0017ff6bc80ee2d22ff3.tar.xz
southbridge/amd: Update Kconfig and makefiles for 00670F00
Add Stoney specific code subtree and fix Makefles and Kconfig files. Author: Charles Marslett <charles@scarlettechnologies.com> Original-Signed-off-by: Marc Jones <marcj303@gmail.com> Original-Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Original-Tested-by: Marshall Dawson <marshalldawson3rd@gmail.com> (cherry picked from commit c3a469d11e4676b3b63d11a30955113291d00ec8) Change-Id: Ic4d97a3745f7fc5a637ae6da17a9009b9757136e Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: https://review.coreboot.org/17217 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge/amd')
-rw-r--r--src/southbridge/amd/pi/hudson/Kconfig5
-rw-r--r--src/southbridge/amd/pi/hudson/Makefile.inc21
2 files changed, 22 insertions, 4 deletions
diff --git a/src/southbridge/amd/pi/hudson/Kconfig b/src/southbridge/amd/pi/hudson/Kconfig
index 5610e11bb8..afa03aaa14 100644
--- a/src/southbridge/amd/pi/hudson/Kconfig
+++ b/src/southbridge/amd/pi/hudson/Kconfig
@@ -1,7 +1,7 @@
##
## This file is part of the coreboot project.
##
-## Copyright (C) 2010 Advanced Micro Devices, Inc.
+## Copyright (C) 2010-2016 Advanced Micro Devices, Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
@@ -80,7 +80,7 @@ config HUDSON_GEC_FWM
config HUDSON_PSP
bool
- default y if CPU_AMD_PI_00730F01 || CPU_AMD_PI_00660F01
+ default y if CPU_AMD_PI_00730F01 || CPU_AMD_PI_00670F00 || CPU_AMD_PI_00660F01
config HUDSON_XHCI_FWM_FILE
string "XHCI firmware path and filename"
@@ -130,6 +130,7 @@ config AMD_PUBKEY_FILE
depends on HUDSON_PSP
string "AMD public Key"
default "3rdparty/blobs/southbridge/amd/avalon/PSP/AmdPubKey.bin" if CPU_AMD_PI_00730F01
+ default "3rdparty/blobs/southbridge/amd/kern/PSP/AmdPubKeyST.bin" if CPU_AMD_PI_00670F00
default "3rdparty/blobs/southbridge/amd/kern/PSP/AmdPubKeyCZ.bin" if CPU_AMD_PI_00660F01
config HUDSON_SATA_MODE
diff --git a/src/southbridge/amd/pi/hudson/Makefile.inc b/src/southbridge/amd/pi/hudson/Makefile.inc
index 53a1a4f004..731e25e579 100644
--- a/src/southbridge/amd/pi/hudson/Makefile.inc
+++ b/src/southbridge/amd/pi/hudson/Makefile.inc
@@ -1,6 +1,6 @@
#*****************************************************************************
#
-# Copyright (c) 2012, Advanced Micro Devices, Inc.
+# Copyright (c) 2012, 2016 Advanced Micro Devices, Inc.
# 2013 - 2014, Sage Electronic Engineering, LLC
# All rights reserved.
#
@@ -81,6 +81,11 @@ FIRMWARE_LOCATE=$(dir $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE)))
FIRMWARE_TYPE=
endif
##
+ifeq ($(CONFIG_CPU_AMD_PI_00670F00), y)
+FIRMWARE_LOCATE=$(dir $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE)))
+FIRMWARE_TYPE=ST
+endif
+##
ifeq ($(CONFIG_CPU_AMD_PI_00660F01), y)
FIRMWARE_LOCATE=$(dir $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE)))
FIRMWARE_TYPE=CZ
@@ -91,6 +96,8 @@ CONFIG_PUBSIGNEDKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/RtmPubSigned$(FIRMWARE_TYPE).
###1
ifeq ($(CONFIG_CPU_AMD_PI_00730F01), y)
CONFIG_PSPBTLDR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspBootLoader$(FIRMWARE_TYPE).Bypass.sbin
+else ifeq ($(CONFIG_CPU_AMD_PI_00670F00), y)
+CONFIG_PSPBTLDR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspBootLoader_prod_$(FIRMWARE_TYPE).sbin
else ifeq ($(CONFIG_CPU_AMD_PI_00660F01), y)
CONFIG_PSPBTLDR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspBootLoader_prod_$(FIRMWARE_TYPE).sbin
endif
@@ -98,6 +105,8 @@ endif
###3
ifeq ($(CONFIG_CPU_AMD_PI_00730F01), y)
CONFIG_PSPRCVR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspRecovery$(FIRMWARE_TYPE).sbin
+else ifeq ($(CONFIG_CPU_AMD_PI_00670F00), y)
+CONFIG_PSPRCVR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspRecoveryBootLoader_prod_$(FIRMWARE_TYPE).sbin
else ifeq ($(CONFIG_CPU_AMD_PI_00660F01), y)
CONFIG_PSPRCVR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspRecoveryBootLoader_prod_$(FIRMWARE_TYPE).sbin
endif
@@ -105,6 +114,8 @@ endif
###2
ifeq ($(CONFIG_CPU_AMD_PI_00730F01), y)
CONFIG_PSPSCUREOS_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureOs$(FIRMWARE_TYPE).sbin
+else ifeq ($(CONFIG_CPU_AMD_PI_00670F00), y)
+CONFIG_PSPSCUREOS_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureOs_prod_$(FIRMWARE_TYPE).csbin
else ifeq ($(CONFIG_CPU_AMD_PI_00660F01), y)
CONFIG_PSPSCUREOS_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureOs_prod_$(FIRMWARE_TYPE).csbin
endif
@@ -124,6 +135,8 @@ CONFIG_PSPSECUREDEBUG_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureDebug$(FIRMWARE_TY
###12
ifeq ($(CONFIG_CPU_AMD_PI_00730F01), y)
CONFIG_PSPTRUSTLETS_FILE=$(top)/$(FIRMWARE_LOCATE)/trustlets.bin
+else ifeq ($(CONFIG_CPU_AMD_PI_00670F00), y)
+CONFIG_PSPTRUSTLETS_FILE=$(top)/$(FIRMWARE_LOCATE)/PspTrustlets_prod_$(FIRMWARE_TYPE).cbin
else ifeq ($(CONFIG_CPU_AMD_PI_00660F01), y)
CONFIG_PSPTRUSTLETS_FILE=$(top)/$(FIRMWARE_LOCATE)/PspTrustlets_prod_$(FIRMWARE_TYPE).cbin
endif
@@ -131,12 +144,16 @@ endif
###13
ifeq ($(CONFIG_CPU_AMD_PI_00730F01), y)
CONFIG_TRUSTLETKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/Trustlet.tkn.cert
+else ifeq ($(CONFIG_CPU_AMD_PI_00670F00), y)
+CONFIG_TRUSTLETKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/TrustletKey_prod_$(FIRMWARE_TYPE).sbin
else ifeq ($(CONFIG_CPU_AMD_PI_00660F01), y)
CONFIG_TRUSTLETKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/TrustletKey_prod_$(FIRMWARE_TYPE).sbin
endif
###18
-ifeq ($(CONFIG_CPU_AMD_PI_00660F01), y)
+ifeq ($(CONFIG_CPU_AMD_PI_00670F00), y)
+CONFIG_SMUFIRMWARE2_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE).sbin
+else ifeq ($(CONFIG_CPU_AMD_PI_00660F01), y)
CONFIG_SMUFIRMWARE2_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE).sbin
endif