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authorJacob Garber <jgarber1@ualberta.ca>2019-06-25 12:46:35 -0600
committerMartin Roth <martinroth@google.com>2019-07-16 16:27:22 +0000
commita9bf88b883e31f2455cbbbd292c41e43fe4b373b (patch)
tree9c72795e351e702bc39e46f0b3501798f9d5df44 /src/southbridge/amd
parent198c2e63ac964364158366468f8db5f8390494c0 (diff)
downloadcoreboot-a9bf88b883e31f2455cbbbd292c41e43fe4b373b.tar.xz
sb/amd/{cimx,}/sb{700,800,900}: Prevent uninitialized reads
There are two hard things in computer science: cache invalidation, naming things, and off-by-one errors. -- Anonymous var_num records the number of initialized entries in the reg_var array. However, this means the index of the last initialized element is one less than the value of var_num, so we need to take that into account when indexing into the array. This has already been fixed in several other places (eg. sb/amd/pi/hudson/lpc.c), so let's also do so here. Change-Id: Ibefabaca42866a3f2b22eff979c73badf86ac317 Signed-off-by: Jacob Garber <jgarber1@ualberta.ca> Found-by: scan-build 8.0.0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/33790 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/southbridge/amd')
-rw-r--r--src/southbridge/amd/cimx/sb800/lpc.c6
-rw-r--r--src/southbridge/amd/cimx/sb900/lpc.c6
-rw-r--r--src/southbridge/amd/sb700/lpc.c6
-rw-r--r--src/southbridge/amd/sb800/lpc.c6
4 files changed, 12 insertions, 12 deletions
diff --git a/src/southbridge/amd/cimx/sb800/lpc.c b/src/southbridge/amd/cimx/sb800/lpc.c
index a88d6d34e9..483d185e32 100644
--- a/src/southbridge/amd/cimx/sb800/lpc.c
+++ b/src/southbridge/amd/cimx/sb800/lpc.c
@@ -170,11 +170,11 @@ void lpc_enable_childrens_resources(struct device *dev)
pci_write_config32(dev, 0x48, reg_x);
/* Set WideIO for as many IOs found (fall through is on purpose) */
switch (var_num) {
- case 2:
+ case 3:
pci_write_config16(dev, 0x90, reg_var[2]);
- case 1:
+ case 2:
pci_write_config16(dev, 0x66, reg_var[1]);
- case 0:
+ case 1:
//pci_write_config16(dev, 0x64, reg_var[0]); //cause filo can not find sata
break;
}
diff --git a/src/southbridge/amd/cimx/sb900/lpc.c b/src/southbridge/amd/cimx/sb900/lpc.c
index b04ecfa123..8fcb947eb6 100644
--- a/src/southbridge/amd/cimx/sb900/lpc.c
+++ b/src/southbridge/amd/cimx/sb900/lpc.c
@@ -168,11 +168,11 @@ void lpc_enable_childrens_resources(struct device *dev)
pci_write_config32(dev, 0x48, reg_x);
/* Set WideIO for as many IOs found (fall through is on purpose) */
switch (var_num) {
- case 2:
+ case 3:
pci_write_config16(dev, 0x90, reg_var[2]);
- case 1:
+ case 2:
pci_write_config16(dev, 0x66, reg_var[1]);
- case 0:
+ case 1:
//pci_write_config16(dev, 0x64, reg_var[0]); //cause filo can not find sata
break;
}
diff --git a/src/southbridge/amd/sb700/lpc.c b/src/southbridge/amd/sb700/lpc.c
index 6f3be03c30..b7f0dc3bbf 100644
--- a/src/southbridge/amd/sb700/lpc.c
+++ b/src/southbridge/amd/sb700/lpc.c
@@ -228,11 +228,11 @@ static void sb700_lpc_enable_childrens_resources(struct device *dev)
pci_write_config32(dev, 0x48, reg_x);
/* Set WideIO for as many IOs found (fall through is on purpose) */
switch (var_num) {
- case 2:
+ case 3:
pci_write_config16(dev, 0x90, reg_var[2]);
- case 1:
+ case 2:
pci_write_config16(dev, 0x66, reg_var[1]);
- case 0:
+ case 1:
pci_write_config16(dev, 0x64, reg_var[0]);
break;
}
diff --git a/src/southbridge/amd/sb800/lpc.c b/src/southbridge/amd/sb800/lpc.c
index 649add5515..74b63741a5 100644
--- a/src/southbridge/amd/sb800/lpc.c
+++ b/src/southbridge/amd/sb800/lpc.c
@@ -220,11 +220,11 @@ static void sb800_lpc_enable_childrens_resources(struct device *dev)
pci_write_config32(dev, 0x48, reg_x);
/* Set WideIO for as many IOs found (fall through is on purpose) */
switch (var_num) {
- case 2:
+ case 3:
pci_write_config16(dev, 0x90, reg_var[2]);
- case 1:
+ case 2:
pci_write_config16(dev, 0x66, reg_var[1]);
- case 0:
+ case 1:
pci_write_config16(dev, 0x64, reg_var[0]);
break;
}