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| author | Furquan Shaikh <furquan@chromium.org> | 2017-04-19 19:27:28 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-05-05 23:42:19 +0200 |
| commit | de705fa1f470683b9ea4ad91c1a9ae5a98942612 (patch) | |
| tree | 60873b2b6772bf459cd8db2f171ae7711d507b02 /src/southbridge/amd | |
| parent | f1db5fdb4d03b4766cf23e4b04a05b0fc05586a0 (diff) | |
| download | coreboot-de705fa1f470683b9ea4ad91c1a9ae5a98942612.tar.xz | |
drivers/spi: Re-factor spi_crop_chunk
spi_crop_chunk is a property of the SPI controller since it depends
upon the maximum transfer size that is supported by the
controller. Also, it is possible to implement this within spi-generic
layer by obtaining following parameters from the controller:
1. max_xfer_size: Maximum transfer size supported by the controller
(Size of 0 indicates invalid size, and unlimited transfer size is
indicated by UINT32_MAX.)
2. deduct_cmd_len: Whether cmd_len needs to be deducted from the
max_xfer_size to determine max data size that can be
transferred. (This is used by the amd boards.)
Change-Id: I81c199413f879c664682088e93bfa3f91c6a46e5
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/19386
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Tested-by: coreboot org <coreboot.org@gmail.com>
Diffstat (limited to 'src/southbridge/amd')
| -rw-r--r-- | src/southbridge/amd/agesa/hudson/spi.c | 7 | ||||
| -rw-r--r-- | src/southbridge/amd/cimx/sb800/spi.c | 7 | ||||
| -rw-r--r-- | src/southbridge/amd/sb700/spi.c | 7 |
3 files changed, 6 insertions, 15 deletions
diff --git a/src/southbridge/amd/agesa/hudson/spi.c b/src/southbridge/amd/agesa/hudson/spi.c index 00f6b29303..1afe3e0ded 100644 --- a/src/southbridge/amd/agesa/hudson/spi.c +++ b/src/southbridge/amd/agesa/hudson/spi.c @@ -85,11 +85,6 @@ void spi_init(void) spibar = pci_read_config32(dev, 0xA0) & ~0x1F; } -unsigned int spi_crop_chunk(unsigned int cmd_len, unsigned int buf_len) -{ - return min(AMD_SB_SPI_TX_LEN - cmd_len, buf_len); -} - static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout, size_t bytesout, void *din, size_t bytesin) { @@ -168,6 +163,8 @@ int chipset_volatile_group_end(const struct spi_flash *flash) static const struct spi_ctrlr spi_ctrlr = { .xfer = spi_ctrlr_xfer, .xfer_vector = spi_xfer_two_vectors, + .max_xfer_size = AMD_SB_SPI_TX_LEN, + .deduct_cmd_len = true, }; int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave) diff --git a/src/southbridge/amd/cimx/sb800/spi.c b/src/southbridge/amd/cimx/sb800/spi.c index 1e847439f9..a6649251d1 100644 --- a/src/southbridge/amd/cimx/sb800/spi.c +++ b/src/southbridge/amd/cimx/sb800/spi.c @@ -54,11 +54,6 @@ void spi_init() spibar = pci_read_config32(dev, 0xA0) & ~0x1F; } -unsigned int spi_crop_chunk(unsigned int cmd_len, unsigned int buf_len) -{ - return min(AMD_SB_SPI_TX_LEN - cmd_len, buf_len); -} - static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout, size_t bytesout, void *din, size_t bytesin) { @@ -159,6 +154,8 @@ int chipset_volatile_group_end(const struct spi_flash *flash) static const struct spi_ctrlr spi_ctrlr = { .xfer = spi_ctrlr_xfer, .xfer_vector = spi_xfer_two_vectors, + .max_xfer_size = AMD_SB_SPI_TX_LEN, + .deduct_cmd_len = true, }; int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave) diff --git a/src/southbridge/amd/sb700/spi.c b/src/southbridge/amd/sb700/spi.c index 5d56415b44..9731896803 100644 --- a/src/southbridge/amd/sb700/spi.c +++ b/src/southbridge/amd/sb700/spi.c @@ -40,11 +40,6 @@ void spi_init(void) /* Not needed */ } -unsigned int spi_crop_chunk(unsigned int cmd_len, unsigned int buf_len) -{ - return min(AMD_SB_SPI_TX_LEN - cmd_len, buf_len); -} - static void reset_internal_fifo_pointer(void) { uint32_t spibar = get_spi_bar(); @@ -121,6 +116,8 @@ static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout, static const struct spi_ctrlr spi_ctrlr = { .xfer = spi_ctrlr_xfer, .xfer_vector = spi_xfer_two_vectors, + .max_xfer_size = AMD_SB_SPI_TX_LEN, + .deduct_cmd_len = true, }; int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave) |