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authorEric Biederman <ebiederm@xmission.com>2004-10-22 02:33:51 +0000
committerEric Biederman <ebiederm@xmission.com>2004-10-22 02:33:51 +0000
commit4f9265fdc6c6609dd801a13415bc7a5378076e78 (patch)
tree30b286a218d9188153cbcef654c2d42c4c340495 /src/southbridge/amd
parent23c3d9321f4fdead52080e9a1a261807d0a3cbc8 (diff)
downloadcoreboot-4f9265fdc6c6609dd801a13415bc7a5378076e78.tar.xz
- kill typo so resources are not mixed up in amdk8/northbridge.c
- Enable resources on the lpc bus. PCI now longer do this by default for their children unless they are bridges. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1703 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd')
-rw-r--r--src/southbridge/amd/amd8111/amd8111_lpc.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/src/southbridge/amd/amd8111/amd8111_lpc.c b/src/southbridge/amd/amd8111/amd8111_lpc.c
index b94b19baab..50025bf2f7 100644
--- a/src/southbridge/amd/amd8111/amd8111_lpc.c
+++ b/src/southbridge/amd/amd8111/amd8111_lpc.c
@@ -170,6 +170,12 @@ static void amd8111_lpc_read_resources(device_t dev)
res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
}
+static void amd8111_lpc_enable_resoruces(device_t dev)
+{
+ pci_dev_enable_resources(dev);
+ enable_childrens_resources(dev);
+}
+
static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
{
@@ -182,7 +188,7 @@ static struct pci_operations lops_pci = {
static struct device_operations lpc_ops = {
.read_resources = amd8111_lpc_read_resources,
.set_resources = pci_dev_set_resources,
- .enable_resources = pci_dev_enable_resources,
+ .enable_resources = amd8111_lpc_enable_resources,
.init = lpc_init,
.scan_bus = scan_static_bus,
.enable = amd8111_enable,