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| author | Andrey Petrov <andrey.petrov@intel.com> | 2016-02-28 22:37:15 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2016-03-05 20:11:35 +0100 |
| commit | 73f7069fe6915cce545d4a5839ab1760e1fed2a2 (patch) | |
| tree | 164a29ca233f89e253aca08ee4b9407eaa17d684 /src/southbridge/amd | |
| parent | dd56de974ddc7d0d8d782b50d9260b0596f59a1a (diff) | |
| download | coreboot-73f7069fe6915cce545d4a5839ab1760e1fed2a2.tar.xz | |
arch/x86: Add common assembly code for stages that run in CAR
This adds a few assembly lines that are generic enough to be shared
between romstage and verstage that are ran in CAR. The GDT reload
is bypassed and the stack is reloaded with the CAR stack defined
in car.ld. The entry point for all those stages is car_stage_entry().
Change-Id: Ie7ef6a02f62627f29a109126d08c68176075bd67
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/13861
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/amd')
0 files changed, 0 insertions, 0 deletions