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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-06-10 11:13:24 +0300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-16 08:04:27 +0000 |
| commit | b264c5ce10f6c4a2f46454b72de25048e0ef21fb (patch) | |
| tree | 0e22db85cac5f64a6384e63045b26fdf8dd74b92 /src/southbridge/amd | |
| parent | 0778c86b3b94490284d0fe686500d29ca791d39d (diff) | |
| download | coreboot-b264c5ce10f6c4a2f46454b72de25048e0ef21fb.tar.xz | |
sb/amd/x/hudson: Replace hudson_enable_smi_generation()
Change-Id: I08b2d1af16c247e66bf1a352887b0f9387055225
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42356
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/southbridge/amd')
| -rw-r--r-- | src/southbridge/amd/agesa/hudson/smi.c | 2 | ||||
| -rw-r--r-- | src/southbridge/amd/agesa/hudson/smi.h | 2 | ||||
| -rw-r--r-- | src/southbridge/amd/pi/hudson/smi.c | 2 | ||||
| -rw-r--r-- | src/southbridge/amd/pi/hudson/smi.h | 2 |
4 files changed, 2 insertions, 6 deletions
diff --git a/src/southbridge/amd/agesa/hudson/smi.c b/src/southbridge/amd/agesa/hudson/smi.c index 9e6db341fd..6c7682511b 100644 --- a/src/southbridge/amd/agesa/hudson/smi.c +++ b/src/southbridge/amd/agesa/hudson/smi.c @@ -16,7 +16,7 @@ void smm_setup_structures(void *gnvs, void *tcg, void *smi1) } /** Set the EOS bit and enable SMI generation from southbridge */ -void hudson_enable_smi_generation(void) +void global_smi_enable(void) { uint32_t reg = smi_read32(SMI_REG_SMITRIG0); reg &= ~SMITRG0_SMIENB; /* Enable SMI generation */ diff --git a/src/southbridge/amd/agesa/hudson/smi.h b/src/southbridge/amd/agesa/hudson/smi.h index e467954cc0..d0187b8c16 100644 --- a/src/southbridge/amd/agesa/hudson/smi.h +++ b/src/southbridge/amd/agesa/hudson/smi.h @@ -37,6 +37,4 @@ void hudson_configure_gevent_smi(uint8_t gevent, uint8_t mode, uint8_t level); void hudson_disable_gevent_smi(uint8_t gevent); void hudson_enable_acpi_cmd_smi(void); -void hudson_enable_smi_generation(void); - #endif /* _SOUTHBRIDGE_AMD_AGESA_HUDSON_SMI_H */ diff --git a/src/southbridge/amd/pi/hudson/smi.c b/src/southbridge/amd/pi/hudson/smi.c index 9e6db341fd..6c7682511b 100644 --- a/src/southbridge/amd/pi/hudson/smi.c +++ b/src/southbridge/amd/pi/hudson/smi.c @@ -16,7 +16,7 @@ void smm_setup_structures(void *gnvs, void *tcg, void *smi1) } /** Set the EOS bit and enable SMI generation from southbridge */ -void hudson_enable_smi_generation(void) +void global_smi_enable(void) { uint32_t reg = smi_read32(SMI_REG_SMITRIG0); reg &= ~SMITRG0_SMIENB; /* Enable SMI generation */ diff --git a/src/southbridge/amd/pi/hudson/smi.h b/src/southbridge/amd/pi/hudson/smi.h index 054888718a..5af3db062d 100644 --- a/src/southbridge/amd/pi/hudson/smi.h +++ b/src/southbridge/amd/pi/hudson/smi.h @@ -37,6 +37,4 @@ void hudson_configure_gevent_smi(uint8_t gevent, uint8_t mode, uint8_t level); void hudson_disable_gevent_smi(uint8_t gevent); void hudson_enable_acpi_cmd_smi(void); -void hudson_enable_smi_generation(void); - #endif /* _SOUTHBRIDGE_AMD_PI_HUDSON_SMI_H */ |