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authorKerry Sheh <shekairui@gmail.com>2011-10-10 19:19:46 +0800
committerMarc Jones <marcj303@gmail.com>2011-10-11 08:11:59 +0200
commit75df1062a1438c40bc94021982fd389848f1d7fc (patch)
treeb7d1da581dc76891dae751283458a5a49b7458d9 /src/southbridge/amd
parent4e9c4c8cc25347693a19aef0201ba2065e3d816f (diff)
downloadcoreboot-75df1062a1438c40bc94021982fd389848f1d7fc.tar.xz
mainboard: complete the sb800 devicetree even device is off
sb800 cimx entry sb_Before_Pci_Init was called in the device 16.2 enable_dev() function. If the devicetree don't have this device, then sb_Before_Pci_Init will not get called. Change-Id: I76ebad842e90b0f740abbec031165d7c39a80abf Signed-off-by: Kerry Sheh <kerry.she@amd.com> Signed-off-by: Kerry Sheh <shekairui@gmail.com> Reviewed-on: http://review.coreboot.org/230 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
Diffstat (limited to 'src/southbridge/amd')
-rw-r--r--src/southbridge/amd/cimx/sb800/late.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c
index b581212aed..c36ee03237 100644
--- a/src/southbridge/amd/cimx/sb800/late.c
+++ b/src/southbridge/amd/cimx/sb800/late.c
@@ -419,7 +419,9 @@ static void sb800_enable(device_t dev)
case (0x16 << 3) | 2: /* 0:16:2 EHCI-USB3 */
sb_config->USBMODE.UsbMode.Ehci3 = dev->enabled;
- /* the last sb800 device */
+ /* call the CIMX entry at the last sb800 device,
+ * so make sure the mainboard devicetree is complete
+ */
sb_Before_Pci_Init();
break;