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authorStefan Reinauer <reinauer@chromium.org>2015-07-30 16:24:46 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2015-10-30 18:20:26 +0100
commita8432114817ca7f5a58d748c04f42403225ca0ca (patch)
tree38d0871bf4ee10da3f9a64b039bbba3811fd37d9 /src/southbridge/amd
parent6a2df9a5e88fc5176994944b66227224d4e2a842 (diff)
downloadcoreboot-a8432114817ca7f5a58d748c04f42403225ca0ca.tar.xz
SB700: 64bit fixes
Change-Id: Ib4b643441a5b887abf73cc55930ea9b01037f6ea Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/11085 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/southbridge/amd')
-rw-r--r--src/southbridge/amd/cimx/sb700/late.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/amd/cimx/sb700/late.c b/src/southbridge/amd/cimx/sb700/late.c
index cd36faca0c..998710d08b 100644
--- a/src/southbridge/amd/cimx/sb700/late.c
+++ b/src/southbridge/amd/cimx/sb700/late.c
@@ -234,7 +234,7 @@ static void sb700_enable(device_t dev)
case (0x14 << 3) | 0: /* 0:14:0 SMBUS */
{
- u32 ioapic_base;
+ uintptr_t ioapic_base;
printk(BIOS_DEBUG, "sm_init().\n");
ioapic_base = IO_APIC_ADDR;
clear_ioapic((void *)ioapic_base);