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authorMartin Roth <martinroth@google.com>2015-10-27 14:10:22 -0600
committerMartin Roth <martinroth@google.com>2015-10-29 17:05:32 +0100
commiteabce729a71dc161128882cba23af8bd00bff06d (patch)
tree4c5d4efa1d24e7522e8cc6b12058ada2d86ede63 /src/southbridge/amd
parentbcaaad1c55c2f1402da1a5dda9dfe3d6b4f07b40 (diff)
downloadcoreboot-eabce729a71dc161128882cba23af8bd00bff06d.tar.xz
amd/sb700: clean up recommended changes
This patch addresses changes requested to commit 85c39a4c (southbridge/amd/sb700: Add Suspend to RAM (S3) support) - remove unused/commented out code - remove unnecessary guards around acpi_get_sleep_type() Change-Id: I2878e038d2f9f8d182615e1f4a75ddce5c45d5f3 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: http://review.coreboot.org/12206 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge/amd')
-rw-r--r--src/southbridge/amd/sb700/early_setup.c6
-rw-r--r--src/southbridge/amd/sb700/lpc.c2
2 files changed, 1 insertions, 7 deletions
diff --git a/src/southbridge/amd/sb700/early_setup.c b/src/southbridge/amd/sb700/early_setup.c
index 4a3a5a8140..25fb5ef0a4 100644
--- a/src/southbridge/amd/sb700/early_setup.c
+++ b/src/southbridge/amd/sb700/early_setup.c
@@ -621,11 +621,7 @@ static void sb700_pmio_por_init(void)
byte |= 1 << 0;
pmio_write(0xB2, byte);
- // FIXME: Enabling this causes boot to hang while initializing processors.
-// /* Enable automatic C1e state switch */
-// byte = pmio_read(0xc9);
-// byte |= 0x11;
-// pmio_write(0xc9, byte);
+ /* NOTE: Enabling automatic C1e state switch caused failures when initializing processors */
/* Enable precision HPET clock and automatic C state switch */
byte = pmio_read(0xbb);
diff --git a/src/southbridge/amd/sb700/lpc.c b/src/southbridge/amd/sb700/lpc.c
index 145a01f50d..8f286d7a35 100644
--- a/src/southbridge/amd/sb700/lpc.c
+++ b/src/southbridge/amd/sb700/lpc.c
@@ -87,13 +87,11 @@ static void lpc_init(device_t dev)
cmos_check_update_date();
}
-#if (!IS_ENABLED(CONFIG_EARLY_CBMEM_INIT))
int acpi_get_sleep_type(void)
{
u16 tmp = inw(ACPI_PM1_CNT_BLK);
return ((tmp & (7 << 10)) >> 10);
}
-#endif
#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT)
void backup_top_of_ram(uint64_t ramtop)