* Set USBDEBUG_DEFAULT_PORT in all southbridges and use that value

  to unify calls to *_enable_usbdebug()
* rename *_enable_usbdebug() to enable_usbdebug()
* move enable_usbdebug() to generic romstage console init code
  and drop it from the individual romstage.c files.

Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Peter Stuge <peter@stuge.se>

 


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6513 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

7 files changed, 10 insertions, 6 deletions

diff --git a/src/southbridge/amd/sb600/Kconfig b/src/southbridge/amd/sb600/Kconfig
index c32318c102..9b164b3758 100644
--- a/src/southbridge/amd/sb600/Kconfig
+++ b/src/southbridge/amd/sb600/Kconfig
@@ -36,6 +36,10 @@ config EHCI_DEBUG_OFFSET
 	hex
 	default 0xe0
 
+config USBDEBUG_DEFAULT_PORT
+	int
+	default 0
+
 choice
 	prompt "SATA Mode"
 	default SATA_MODE_IDE
diff --git a/src/southbridge/amd/sb600/enable_usbdebug.c b/src/southbridge/amd/sb600/enable_usbdebug.c
index b4d97b0da2..3671686cb2 100644
--- a/src/southbridge/amd/sb600/enable_usbdebug.c
+++ b/src/southbridge/amd/sb600/enable_usbdebug.c
@@ -30,7 +30,7 @@ void set_debug_port(unsigned int port)
 	/* TODO: Allow changing the physical USB port used as Debug Port. */
 }
 
-void sb600_enable_usbdebug(unsigned int port)
+void enable_usbdebug(unsigned int port)
 {
 	device_t dev = PCI_DEV(0, 0x13, 5); /* USB EHCI, D19:F5 */
 
diff --git a/src/southbridge/amd/sb600/sb600.h b/src/southbridge/amd/sb600/sb600.h
index 0ba107acc7..97a7ad2638 100644
--- a/src/southbridge/amd/sb600/sb600.h
+++ b/src/southbridge/amd/sb600/sb600.h
@@ -40,5 +40,5 @@ void sb600_enable(device_t dev);
 void sb600_lpc_port80(void);
 void sb600_pci_port80(void);
 
-void sb600_enable_usbdebug(unsigned int port);
+void enable_usbdebug(unsigned int port);
 #endif /* SB600_H */
diff --git a/src/southbridge/amd/sb700/enable_usbdebug.c b/src/southbridge/amd/sb700/enable_usbdebug.c
index b8d584a73c..f263afefea 100644
--- a/src/southbridge/amd/sb700/enable_usbdebug.c
+++ b/src/southbridge/amd/sb700/enable_usbdebug.c
@@ -45,7 +45,7 @@ void set_debug_port(unsigned int port)
  * This code currently only supports the first one, i.e., USB Debug devices
  * attached to physical USB ports belonging to the first EHCI device.
  */
-void sb7xx_51xx_enable_usbdebug(unsigned int port)
+void enable_usbdebug(unsigned int port)
 {
 	device_t dev = PCI_DEV(0, 0x12, 2); /* USB EHCI, D18:F2 */
 
diff --git a/src/southbridge/amd/sb700/sb700.h b/src/southbridge/amd/sb700/sb700.h
index 741d244b86..60eea47ee7 100644
--- a/src/southbridge/amd/sb700/sb700.h
+++ b/src/southbridge/amd/sb700/sb700.h
@@ -75,5 +75,5 @@ void sb7xx_51xx_setup_sata_phys(struct device *dev);
 int s3_save_nvram_early(u32 dword, int size, int  nvram_pos);
 int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos);
 
-void sb7xx_51xx_enable_usbdebug(unsigned int port);
+void enable_usbdebug(unsigned int port);
 #endif /* SB700_H */
diff --git a/src/southbridge/amd/sb800/enable_usbdebug.c b/src/southbridge/amd/sb800/enable_usbdebug.c
index d58437a68e..174b0f2aa5 100644
--- a/src/southbridge/amd/sb800/enable_usbdebug.c
+++ b/src/southbridge/amd/sb800/enable_usbdebug.c
@@ -43,7 +43,7 @@ void set_debug_port(unsigned int port)
 }
 
 
-void sb800_enable_usbdebug(unsigned int port)
+void enable_usbdebug(unsigned int port)
 {
 	pci_write_config32(PCI_DEV(0, SB800_DEVN_BASE + 0x13, 5),
 			   EHCI_BAR_INDEX, CONFIG_EHCI_BAR);
diff --git a/src/southbridge/amd/sb800/sb800.h b/src/southbridge/amd/sb800/sb800.h
index caaeee992b..d7a4a38412 100644
--- a/src/southbridge/amd/sb800/sb800.h
+++ b/src/southbridge/amd/sb800/sb800.h
@@ -58,7 +58,7 @@ void sb800_clk_output_48Mhz(void);
 int s3_save_nvram_early(u32 dword, int size, int  nvram_pos);
 int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos);
 
-void sb800_enable_usbdebug(unsigned int port);
+void enable_usbdebug(unsigned int port);
 #else
 void sb800_enable(device_t dev);
 void __attribute__((weak)) sb800_setup_sata_phys(struct device *dev);