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| author | Maggie Li <Maggie.li@amd.com> | 2008-12-23 02:22:07 +0000 |
|---|---|---|
| committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2008-12-23 02:22:07 +0000 |
| commit | b96af1ea60cf4f0c7c40901e739959aa1df8acae (patch) | |
| tree | 8547254e407304e93dbd5048227b8381eac929de /src/southbridge/amd | |
| parent | c589e5acf953fdfcfa941d8514b2d4c400f74b08 (diff) | |
| download | coreboot-b96af1ea60cf4f0c7c40901e739959aa1df8acae.tar.xz | |
Fix implicit declarations of pci_read_config32 and pci_write_config32 in
the SB600 code.
Signed-off-by: Maggie Li <Maggie.li@amd.com>
Reviewed-by: Zheng bao <Zheng.bao@amd.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3837 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd')
| -rw-r--r-- | src/southbridge/amd/sb600/sb600_reset.c | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/src/southbridge/amd/sb600/sb600_reset.c b/src/southbridge/amd/sb600/sb600_reset.c index 68913b4846..d6ea995a5c 100644 --- a/src/southbridge/amd/sb600/sb600_reset.c +++ b/src/southbridge/amd/sb600/sb600_reset.c @@ -26,6 +26,30 @@ typedef u32 device_t; +static void pci_write_config8(device_t dev, unsigned where, unsigned char value) +{ + unsigned addr; + addr = (dev>>4) | where; + outl(0x80000000 | (addr & ~3), 0xCF8); + outb(value, 0xCFC + (addr & 3)); +} + +static void pci_write_config32(device_t dev, unsigned where, unsigned value) +{ + unsigned addr; + addr = (dev>>4) | where; + outl(0x80000000 | (addr & ~3), 0xCF8); + outl(value, 0xCFC); +} + +static unsigned pci_read_config32(device_t dev, unsigned where) +{ + unsigned addr; + addr = (dev>>4) | where; + outl(0x80000000 | (addr & ~3), 0xCF8); + return inl(0xCFC); +} + #include "../../../northbridge/amd/amdk8/reset_test.c" void hard_reset(void) |