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| author | Peter Stuge <peter@stuge.se> | 2010-05-23 04:50:41 +0000 |
|---|---|---|
| committer | Peter Stuge <peter@stuge.se> | 2010-05-23 04:50:41 +0000 |
| commit | ae3f4b572599ed1e2f149aee0d74e976948a5305 (patch) | |
| tree | 3852f1b3661202b2c4b7bd423790ed39b72ae5a5 /src/southbridge/amd | |
| parent | 78c733c2b737d0bfba8e9c614ab50a9dd04c8cc8 (diff) | |
| download | coreboot-ae3f4b572599ed1e2f149aee0d74e976948a5305.tar.xz | |
Fix bug from r5476 re CS5536 device search during GeodeLX PCI domain enable
cs5536.c:chipsetinit() is called during northbridge pci_domain_enable()
which happens before scan_bus() so the device tree does not have PCI
vendor/device ids yet. Let's use dev_find_slot() for now. This works
only as long as the CS5536 has PCI device id 0xf in all mainboards,
and a better solution is needed in case that ever changes!
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Nathan Williams <nathan@traverse.com.au>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5581 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd')
| -rw-r--r-- | src/southbridge/amd/cs5536/cs5536.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/southbridge/amd/cs5536/cs5536.c b/src/southbridge/amd/cs5536/cs5536.c index 11679278f8..dbf42b913f 100644 --- a/src/southbridge/amd/cs5536/cs5536.c +++ b/src/southbridge/amd/cs5536/cs5536.c @@ -530,8 +530,7 @@ void chipsetinit(void) struct southbridge_amd_cs5536_config *sb; struct msrinit *csi; - dev = dev_find_device(PCI_VENDOR_ID_AMD, - PCI_DEVICE_ID_AMD_CS5536_ISA, 0); + dev = dev_find_slot(0, PCI_DEVFN(0xf, 0)); if (!dev) { printk(BIOS_ERR, "CS5536 not found.\n"); |