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authorStefan Reinauer <stepan@coresystems.de>2010-04-07 15:32:52 +0000
committerStefan Reinauer <stepan@openbios.org>2010-04-07 15:32:52 +0000
commiteea66b7c3534d2959be482fc97b84d656c5bb953 (patch)
treed74d175312eb5a68ba5faf96a00c4a340a420e45 /src/southbridge/amd
parente9de1e2609dfeab0b638b1e8facd642a88428745 (diff)
downloadcoreboot-eea66b7c3534d2959be482fc97b84d656c5bb953.tar.xz
no warnings day
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5371 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd')
-rw-r--r--src/southbridge/amd/amd8111/amd8111_reset.c1
-rw-r--r--src/southbridge/amd/rs780/rs780_early_setup.c2
2 files changed, 3 insertions, 0 deletions
diff --git a/src/southbridge/amd/amd8111/amd8111_reset.c b/src/southbridge/amd/amd8111/amd8111_reset.c
index e3c061d457..9b26bcb90d 100644
--- a/src/southbridge/amd/amd8111/amd8111_reset.c
+++ b/src/southbridge/amd/amd8111/amd8111_reset.c
@@ -1,4 +1,5 @@
#include <arch/io.h>
+#include <reset.h>
#include <device/pci_ids.h>
#define PCI_DEV(BUS, DEV, FN) ( \
diff --git a/src/southbridge/amd/rs780/rs780_early_setup.c b/src/southbridge/amd/rs780/rs780_early_setup.c
index 2ebda9a7da..236d95fef9 100644
--- a/src/southbridge/amd/rs780/rs780_early_setup.c
+++ b/src/southbridge/amd/rs780/rs780_early_setup.c
@@ -177,6 +177,7 @@ static u8 is_famly10(void)
return (cpuid_eax(1) & 0xff00000) != 0;
}
+#if CONFIG_NORTHBRIDGE_AMD_AMDFAM10 == 1 /* save some spaces */
static u8 l3_cache(void)
{
return (cpuid_edx(0x80000006) & (0x3FFF << 18)) != 0;
@@ -186,6 +187,7 @@ static u8 cpu_core_number(void)
{
return (cpuid_ecx(0x80000008) & 0xFF) + 1;
}
+#endif
static u8 get_nb_rev(device_t nb_dev)
{