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authorJacob Garber <jgarber1@ualberta.ca>2019-06-13 11:57:35 -0600
committerMartin Roth <martinroth@google.com>2019-06-18 13:49:02 +0000
commitce0c5334a012230faf08fc3b901bb12010eb0208 (patch)
treeef2860d8bcb7e2a2b6a3fcded77ffff93b7354e0 /src/southbridge/amd
parent7407210a6755b22862c22a87c21ed172cb646616 (diff)
downloadcoreboot-ce0c5334a012230faf08fc3b901bb12010eb0208.tar.xz
sb/amd/cimx/sb900: Change logical negation to bitwise
data &= !BIT0 will clear data, since !BIT0 evaluates to 0 (oops). We only want to clear bit 0, not the whole thing, so use bitwise negation instead. Change-Id: I2179119e0d2d4aceaf4f8b499bf4c5baf4ef677f Signed-off-by: Jacob Garber <jgarber1@ualberta.ca> Found-by: Coverity CID 1241812 Reviewed-on: https://review.coreboot.org/c/coreboot/+/33454 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/southbridge/amd')
-rw-r--r--src/southbridge/amd/cimx/sb900/early.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/amd/cimx/sb900/early.c b/src/southbridge/amd/cimx/sb900/early.c
index 5ebe47e5fb..1aa9a5a4ba 100644
--- a/src/southbridge/amd/cimx/sb900/early.c
+++ b/src/southbridge/amd/cimx/sb900/early.c
@@ -39,7 +39,7 @@ void sb_poweron_init(void)
//Enable/Disable PCI Bridge Device 14 Function 4.
outb(0xEA, 0xCD6);
data = inb(0xCD7);
- data &= !BIT0;
+ data &= ~BIT0;
if (!CONFIG(PCIB_ENABLE)) {
data |= BIT0;
}