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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-12-10 09:03:17 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-06-25 05:43:18 +0200 |
| commit | 207880cd1127acd6f5f0f2241d753aa6b1c39da0 (patch) | |
| tree | 1cde460683323d1e8aa036447cf237c2360aeec9 /src/southbridge/amd | |
| parent | 206f37043ed4c8581c7351399c267434653ec13b (diff) | |
| download | coreboot-207880cd1127acd6f5f0f2241d753aa6b1c39da0.tar.xz | |
Declare acpi_is_wakeup_early() only once
Change-Id: I5314d76168c40a6327d4a9ac3b4f4fb05497d6fc
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/4525
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/southbridge/amd')
| -rw-r--r-- | src/southbridge/amd/agesa/hudson/hudson.h | 2 | ||||
| -rw-r--r-- | src/southbridge/amd/cimx/sb800/sb_cimx.h | 2 | ||||
| -rw-r--r-- | src/southbridge/amd/sb700/early_setup.c | 2 | ||||
| -rw-r--r-- | src/southbridge/amd/sb700/sb700.h | 4 | ||||
| -rw-r--r-- | src/southbridge/amd/sb800/early_setup.c | 3 |
5 files changed, 3 insertions, 10 deletions
diff --git a/src/southbridge/amd/agesa/hudson/hudson.h b/src/southbridge/amd/agesa/hudson/hudson.h index 50f1738b4e..f67af05cd0 100644 --- a/src/southbridge/amd/agesa/hudson/hudson.h +++ b/src/southbridge/amd/agesa/hudson/hudson.h @@ -70,8 +70,6 @@ void hudson_clk_output_48Mhz(void); int s3_save_nvram_early(u32 dword, int size, int nvram_pos); int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos); -int acpi_is_wakeup_early(void); - #else void hudson_enable(device_t dev); void __attribute__((weak)) hudson_setup_sata_phys(struct device *dev); diff --git a/src/southbridge/amd/cimx/sb800/sb_cimx.h b/src/southbridge/amd/cimx/sb800/sb_cimx.h index 6267e1c55a..cd8c42b6e6 100644 --- a/src/southbridge/amd/cimx/sb800/sb_cimx.h +++ b/src/southbridge/amd/cimx/sb800/sb_cimx.h @@ -32,8 +32,6 @@ void sb_Late_Post(void); void sb_Before_Pci_Restore_Init(void); void sb_After_Pci_Restore_Init(void); -int acpi_is_wakeup_early(void); - /** * CIMX not set the clock to 48Mhz until sbBeforePciInit, * coreboot may need to set this even more earlier diff --git a/src/southbridge/amd/sb700/early_setup.c b/src/southbridge/amd/sb700/early_setup.c index ddba1a8438..b7a5e7786a 100644 --- a/src/southbridge/amd/sb700/early_setup.c +++ b/src/southbridge/amd/sb700/early_setup.c @@ -21,13 +21,13 @@ #define _SB700_EARLY_SETUP_C_ #include <stdint.h> +#include <arch/acpi.h> #include <arch/cpu.h> #include <arch/io.h> #include <console/console.h> #include <cpu/x86/msr.h> #include <reset.h> -#include <arch/cpu.h> #include <cbmem.h> #include "sb700.h" #include "smbus.h" diff --git a/src/southbridge/amd/sb700/sb700.h b/src/southbridge/amd/sb700/sb700.h index b70e395831..2cbfdc9381 100644 --- a/src/southbridge/amd/sb700/sb700.h +++ b/src/southbridge/amd/sb700/sb700.h @@ -75,10 +75,6 @@ void sb7xx_51xx_setup_sata_phys(struct device *dev); #endif -#if CONFIG_HAVE_ACPI_RESUME -int acpi_is_wakeup_early(void); -#endif - int s3_save_nvram_early(u32 dword, int size, int nvram_pos); int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos); diff --git a/src/southbridge/amd/sb800/early_setup.c b/src/southbridge/amd/sb800/early_setup.c index 213cae96e7..ef0548c10d 100644 --- a/src/southbridge/amd/sb800/early_setup.c +++ b/src/southbridge/amd/sb800/early_setup.c @@ -21,6 +21,7 @@ #define _SB800_EARLY_SETUP_C_ #include <reset.h> +#include <arch/acpi.h> #include <arch/cpu.h> #include <cbmem.h> #include "sb800.h" @@ -666,7 +667,7 @@ int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos) } #if CONFIG_HAVE_ACPI_RESUME -static int acpi_is_wakeup_early(void) +int acpi_is_wakeup_early(void) { u16 tmp; tmp = inw(ACPI_PM1_CNT_BLK); |