diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2014-07-27 19:37:31 +0200 |
|---|---|---|
| committer | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-07-29 04:40:27 +0200 |
| commit | 0f92f630556b4bf2e4c0696cae4c2f8e97eda334 (patch) | |
| tree | b97ad7a89a101c4770774035db5e4693043be928 /src/southbridge/amd | |
| parent | 081651b6677c64a5f2861d831822b5f8f3517c21 (diff) | |
| download | coreboot-0f92f630556b4bf2e4c0696cae4c2f8e97eda334.tar.xz | |
Uniformly spell frequency unit symbol as Hz
Change-Id: I1eb8d5bd79322ff3654a6ad66278a57d46a818c1
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: http://review.coreboot.org/6384
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/southbridge/amd')
| -rw-r--r-- | src/southbridge/amd/rs780/early_setup.c | 26 | ||||
| -rw-r--r-- | src/southbridge/amd/sr5650/early_setup.c | 26 |
2 files changed, 26 insertions, 26 deletions
diff --git a/src/southbridge/amd/rs780/early_setup.c b/src/southbridge/amd/rs780/early_setup.c index b3139b54ab..a36112bebb 100644 --- a/src/southbridge/amd/rs780/early_setup.c +++ b/src/southbridge/amd/rs780/early_setup.c @@ -186,20 +186,20 @@ static u8 get_nb_rev(device_t nb_dev) *****************************************/ static const u8 rs780_ibias[] = { /* 1, 3 are reserved. */ - [0x0] = 0x4C, /* 200Mhz HyperTransport 1 only */ - [0x2] = 0x4C, /* 400Mhz HyperTransport 1 only */ - [0x4] = 0xB6, /* 600Mhz HyperTransport 1 only */ - [0x5] = 0x4C, /* 800Mhz HyperTransport 1 only */ - [0x6] = 0x9D, /* 1Ghz HyperTransport 1 only */ + [0x0] = 0x4C, /* 200MHz HyperTransport 1 only */ + [0x2] = 0x4C, /* 400MHz HyperTransport 1 only */ + [0x4] = 0xB6, /* 600MHz HyperTransport 1 only */ + [0x5] = 0x4C, /* 800MHz HyperTransport 1 only */ + [0x6] = 0x9D, /* 1GHz HyperTransport 1 only */ /* HT3 for Family 10 */ - [0x7] = 0xB6, /* 1.2Ghz HyperTransport 3 only */ - [0x8] = 0x2B, /* 1.4Ghz HyperTransport 3 only */ - [0x9] = 0x4C, /* 1.6Ghz HyperTransport 3 only */ - [0xa] = 0x6C, /* 1.8Ghz HyperTransport 3 only */ - [0xb] = 0x9D, /* 2.0Ghz HyperTransport 3 only */ - [0xc] = 0xAD, /* 2.2Ghz HyperTransport 3 only */ - [0xd] = 0xB6, /* 2.4Ghz HyperTransport 3 only */ - [0xe] = 0xC6, /* 2.6Ghz HyperTransport 3 only */ + [0x7] = 0xB6, /* 1.2GHz HyperTransport 3 only */ + [0x8] = 0x2B, /* 1.4GHz HyperTransport 3 only */ + [0x9] = 0x4C, /* 1.6GHz HyperTransport 3 only */ + [0xa] = 0x6C, /* 1.8GHz HyperTransport 3 only */ + [0xb] = 0x9D, /* 2.0GHz HyperTransport 3 only */ + [0xc] = 0xAD, /* 2.2GHz HyperTransport 3 only */ + [0xd] = 0xB6, /* 2.4GHz HyperTransport 3 only */ + [0xe] = 0xC6, /* 2.6GHz HyperTransport 3 only */ }; static void rs780_htinit(void) diff --git a/src/southbridge/amd/sr5650/early_setup.c b/src/southbridge/amd/sr5650/early_setup.c index 65bce13cf1..e8fb9561f7 100644 --- a/src/southbridge/amd/sr5650/early_setup.c +++ b/src/southbridge/amd/sr5650/early_setup.c @@ -126,20 +126,20 @@ static u8 get_nb_rev(device_t nb_dev) *****************************************/ static const u8 sr5650_ibias[] = { /* 1, 3 are reserved. */ - [0x0] = 0x44, /* 200Mhz HyperTransport 1 only */ - [0x2] = 0x44, /* 400Mhz HyperTransport 1 only */ - [0x4] = 0xB6, /* 600Mhz HyperTransport 1 only */ - [0x5] = 0x44, /* 800Mhz HyperTransport 1 only */ - [0x6] = 0x96, /* 1Ghz HyperTransport 1 only */ + [0x0] = 0x44, /* 200MHz HyperTransport 1 only */ + [0x2] = 0x44, /* 400MHz HyperTransport 1 only */ + [0x4] = 0xB6, /* 600MHz HyperTransport 1 only */ + [0x5] = 0x44, /* 800MHz HyperTransport 1 only */ + [0x6] = 0x96, /* 1GHz HyperTransport 1 only */ /* HT3 for Family 10 */ - [0x7] = 0xB6, /* 1.2Ghz HyperTransport 3 only */ - [0x8] = 0x23, /* 1.4Ghz HyperTransport 3 only */ - [0x9] = 0x44, /* 1.6Ghz HyperTransport 3 only */ - [0xa] = 0x64, /* 1.8Ghz HyperTransport 3 only */ - [0xb] = 0x96, /* 2.0Ghz HyperTransport 3 only */ - [0xc] = 0xA6, /* 2.2Ghz HyperTransport 3 only */ - [0xd] = 0xB6, /* 2.4Ghz HyperTransport 3 only */ - [0xe] = 0xC6, /* 2.6Ghz HyperTransport 3 only */ + [0x7] = 0xB6, /* 1.2GHz HyperTransport 3 only */ + [0x8] = 0x23, /* 1.4GHz HyperTransport 3 only */ + [0x9] = 0x44, /* 1.6GHz HyperTransport 3 only */ + [0xa] = 0x64, /* 1.8GHz HyperTransport 3 only */ + [0xb] = 0x96, /* 2.0GHz HyperTransport 3 only */ + [0xc] = 0xA6, /* 2.2GHz HyperTransport 3 only */ + [0xd] = 0xB6, /* 2.4GHz HyperTransport 3 only */ + [0xe] = 0xC6, /* 2.6GHz HyperTransport 3 only */ }; void sr5650_htinit(void) |