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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-08-21 18:36:06 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-08-28 18:26:07 +0200 |
| commit | 70d79a454676b551f3bc2059217179e31905ee5c (patch) | |
| tree | 1a27cd7c57a9d46d0c7d6e7aaeb361c73dfac872 /src/southbridge/amd | |
| parent | 03b040b95f1a16d07b98e15c1aeef77ec7a4eca9 (diff) | |
| download | coreboot-70d79a454676b551f3bc2059217179e31905ee5c.tar.xz | |
src/southbridge: Add required space before opening parenthesis '('
Change-Id: I43b9b86fd51dbdc50108026099c60238f3012cbe
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16290
Tested-by: build bot (Jenkins)
Reviewed-by: Omar Pakker
Diffstat (limited to 'src/southbridge/amd')
| -rw-r--r-- | src/southbridge/amd/amd8132/bridge.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/amd/amd8132/bridge.c b/src/southbridge/amd/amd8132/bridge.c index b1f9d1419a..6979a1e379 100644 --- a/src/southbridge/amd/amd8132/bridge.c +++ b/src/southbridge/amd/amd8132/bridge.c @@ -386,7 +386,7 @@ static void amd8132_ioapic_init(device_t dev) } - if( (chip_rev == 0x11) ||(chip_rev == 0x12) ) { + if ( (chip_rev == 0x11) ||(chip_rev == 0x12) ) { //for b1 b2 /* Errata #73 */ dword = pci_read_config32(dev, 0x80); |