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| author | WANG Siyuan <wangsiyuanbuaa@gmail.com> | 2013-08-21 10:06:25 +0800 |
|---|---|---|
| committer | Bruce Griffith <Bruce.Griffith@se-eng.com> | 2013-08-27 19:08:20 +0200 |
| commit | a9b01d13476eae77b4a1f1679b29eced69684492 (patch) | |
| tree | 1d93d254575ab4dc1a39b863e6bc8d8df888b337 /src/southbridge/amd | |
| parent | 9090ff91e175423ee6dce4fc36b338135435b8a3 (diff) | |
| download | coreboot-a9b01d13476eae77b4a1f1679b29eced69684492.tar.xz | |
AMD f16kb: use AZ_PIN in Kconfig to customize AZALIA_PIN in Yangtze
src/southbridge/amd/agesa/hudson/Kconfig config default value,
mainboard Kconfig config value for specific mainboard.
bit 1,0 - pin 0
bit 3,2 - pin 1
bit 5,4 - pin 2
bit 7,6 - pin 3
Change-Id: I54a87cf734685515a3e1850838ca7d94387172ce
Signed-off-by: WANG Siyuan <SiYuan.Wang@amd.com>
Signed-off-by: WANG Siyuan <wangsiyuanbuaa@gmail.com>
Reviewed-on: http://review.coreboot.org/3879
Tested-by: build bot (Jenkins)
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
Diffstat (limited to 'src/southbridge/amd')
| -rw-r--r-- | src/southbridge/amd/agesa/hudson/Kconfig | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/southbridge/amd/agesa/hudson/Kconfig b/src/southbridge/amd/agesa/hudson/Kconfig index 5cb17223f7..7e7399c090 100644 --- a/src/southbridge/amd/agesa/hudson/Kconfig +++ b/src/southbridge/amd/agesa/hudson/Kconfig @@ -247,4 +247,13 @@ if SOUTHBRIDGE_AMD_AGESA_YANGTZE config AMD_SB_SPI_TX_LEN int default 64 + + config AZ_PIN + hex + default 0xaa + help + bit 1,0 - pin 0 + bit 3,2 - pin 1 + bit 5,4 - pin 2 + bit 7,6 - pin 3 endif |