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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-03-20 09:46:32 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-03-22 12:21:05 +0000
commitd096a64bcd8383e074809ab62b08d270ab688456 (patch)
tree2756c26360db62daa75ff6ee8041c489e2a69ffb /src/southbridge/broadcom/bcm5785/bcm5785.c
parent321bce4a3f472cfcd1f9af12e0204f6648ce499e (diff)
downloadcoreboot-d096a64bcd8383e074809ab62b08d270ab688456.tar.xz
sb/broadcom/bcm5785: Consolidate PCI set_subsystem()
This one uses vendor-specific register for the write. Change-Id: Ie36a87314054d00daed6a63b495bd5f5eabef66e Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31989 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/southbridge/broadcom/bcm5785/bcm5785.c')
-rw-r--r--src/southbridge/broadcom/bcm5785/bcm5785.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/southbridge/broadcom/bcm5785/bcm5785.c b/src/southbridge/broadcom/bcm5785/bcm5785.c
index beaa94aeef..50d13b030b 100644
--- a/src/southbridge/broadcom/bcm5785/bcm5785.c
+++ b/src/southbridge/broadcom/bcm5785/bcm5785.c
@@ -86,6 +86,13 @@ void bcm5785_enable(struct device *dev)
#endif
}
+void bcm5785_set_subsystem(struct device *dev, unsigned int vendor,
+ unsigned int device)
+{
+ pci_write_config32(dev, 0x40,
+ ((device & 0xffff) << 16) | (vendor & 0xffff));
+}
+
struct chip_operations southbridge_broadcom_bcm5785_ops = {
CHIP_NAME("Serverworks BCM5785 Southbridge")
.enable_dev = bcm5785_enable,