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| author | Stefan Reinauer <stepan@coresystems.de> | 2010-03-31 14:47:43 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-03-31 14:47:43 +0000 |
| commit | 64ed2b73451de4b655b3fdda0ff42825a165c317 (patch) | |
| tree | 0faaae313a9a9edbf8b33f56fc18830ba14aa75f /src/southbridge/broadcom/bcm5785 | |
| parent | 5a1f5970857a5ad1fda0cf9d5945192408bf537b (diff) | |
| download | coreboot-64ed2b73451de4b655b3fdda0ff42825a165c317.tar.xz | |
Drop \r\n and \n\r as both print_XXX and printk now do this internally.
Only some assembler files still have \r\n ... Can we move that part to C
completely?
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5342 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/broadcom/bcm5785')
| -rw-r--r-- | src/southbridge/broadcom/bcm5785/bcm5785_early_smbus.c | 4 | ||||
| -rw-r--r-- | src/southbridge/broadcom/bcm5785/bcm5785_lpc.c | 2 | ||||
| -rw-r--r-- | src/southbridge/broadcom/bcm5785/bcm5785_sata.c | 4 |
3 files changed, 5 insertions, 5 deletions
diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_early_smbus.c b/src/southbridge/broadcom/bcm5785/bcm5785_early_smbus.c index b6a2fe506e..64b8d07245 100644 --- a/src/southbridge/broadcom/bcm5785/bcm5785_early_smbus.c +++ b/src/southbridge/broadcom/bcm5785/bcm5785_early_smbus.c @@ -13,10 +13,10 @@ static void enable_smbus(void) dev = pci_locate_device(PCI_ID(0x1166, 0x0205), 0); // 0x0201? if (dev == PCI_DEV_INVALID) { - die("SMBUS controller not found\r\n"); + die("SMBUS controller not found\n"); } - print_debug("SMBus controller enabled\r\n"); + print_debug("SMBus controller enabled\n"); /* set smbus iobase */ pci_write_config32(dev, 0x90, SMBUS_IO_BASE | 1); /* Set smbus iospace enable */ diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_lpc.c b/src/southbridge/broadcom/bcm5785/bcm5785_lpc.c index 136c03a88b..462d9edf2d 100644 --- a/src/southbridge/broadcom/bcm5785/bcm5785_lpc.c +++ b/src/southbridge/broadcom/bcm5785/bcm5785_lpc.c @@ -86,7 +86,7 @@ static void bcm5785_lpc_enable_childrens_resources(device_t dev) if(!(res->flags & IORESOURCE_IO)) continue; base = res->base; end = resource_end(res); - printk(BIOS_DEBUG, "bcm5785lpc decode:%s, base=0x%08lx, end=0x%08lx\r\n",dev_path(child),base, end); + printk(BIOS_DEBUG, "bcm5785lpc decode:%s, base=0x%08lx, end=0x%08lx\n",dev_path(child),base, end); switch(base) { case 0x60: //KBC case 0x64: diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_sata.c b/src/southbridge/broadcom/bcm5785/bcm5785_sata.c index 7cd9c27f35..e82fa3ca8e 100644 --- a/src/southbridge/broadcom/bcm5785/bcm5785_sata.c +++ b/src/southbridge/broadcom/bcm5785/bcm5785_sata.c @@ -53,13 +53,13 @@ static void sata_init(struct device *dev) for(i=0; i<4; i++) { mmio = base + 0x100 * i; byte = read8(mmio + 0x40); - printk(BIOS_DEBUG, "port %d PHY status = %02x\r\n", i, byte); + printk(BIOS_DEBUG, "port %d PHY status = %02x\n", i, byte); if(byte & 0x4) {// bit 2 is set byte = read8(mmio+0x48); write8(mmio + 0x48, byte | 1); write8(mmio + 0x48, byte & (~1)); byte = read8(mmio + 0x40); - printk(BIOS_DEBUG, "after reset port %d PHY status = %02x\r\n", i, byte); + printk(BIOS_DEBUG, "after reset port %d PHY status = %02x\n", i, byte); } } |