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authorStefan Reinauer <stepan@coresystems.de>2010-07-08 16:41:05 +0000
committerStefan Reinauer <stepan@openbios.org>2010-07-08 16:41:05 +0000
commit6f57b514cb6e0598b295a3d8a4345dd42209e1e6 (patch)
treebb54404f902b1339bdba36523d4ba069628b5532 /src/southbridge/broadcom
parent817d7542f708215c4128b6cdc39ca7d7e1256b26 (diff)
downloadcoreboot-6f57b514cb6e0598b295a3d8a4345dd42209e1e6.tar.xz
Fix all warnings in the tree
(does not fix the cmos.layout race yet) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5660 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/broadcom')
-rw-r--r--src/southbridge/broadcom/bcm5785/bcm5785.h7
-rw-r--r--src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c9
2 files changed, 12 insertions, 4 deletions
diff --git a/src/southbridge/broadcom/bcm5785/bcm5785.h b/src/southbridge/broadcom/bcm5785/bcm5785.h
index 5f7f94f5e2..c06a961ffd 100644
--- a/src/southbridge/broadcom/bcm5785/bcm5785.h
+++ b/src/southbridge/broadcom/bcm5785/bcm5785.h
@@ -3,6 +3,13 @@
#include "chip.h"
+#ifndef __PRE_RAM__
void bcm5785_enable(device_t dev);
+#else
+void enable_fid_change_on_sb(unsigned sbbusn, unsigned sbdn);
+#endif
+
+void ldtstop_sb(void);
+unsigned get_sbdn(unsigned bus);
#endif /* BCM5785_H */
diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c b/src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c
index 62e004dac3..41b4ca3a10 100644
--- a/src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c
+++ b/src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c
@@ -4,6 +4,7 @@
*/
#include <reset.h>
+#include "bcm5785.h"
#include "bcm5785_enable_rom.c"
static void bcm5785_enable_lpc(void)
@@ -53,12 +54,12 @@ static void bcm5785_enable_wdt_port_cf9(void)
pci_write_config8(dev, 0x40, (1<<2));
}
-static unsigned get_sbdn(unsigned bus)
+unsigned get_sbdn(unsigned bus)
{
device_t dev;
/* Find the device.
- * There can only be one 8111 on a hypertransport chain/bus.
+ * There can only be one bcm5785 on a hypertransport chain/bus.
*/
dev = pci_locate_device_on_bus(
PCI_ID(0x1166, 0x0036),
@@ -70,7 +71,7 @@ static unsigned get_sbdn(unsigned bus)
#define SB_VFSMAF 0
-static void enable_fid_change_on_sb(unsigned sbbusn, unsigned sbdn)
+void enable_fid_change_on_sb(unsigned sbbusn, unsigned sbdn)
{
//ACPI Decode Enable
outb(0x0e, 0xcd6);
@@ -89,7 +90,7 @@ static void enable_fid_change_on_sb(unsigned sbbusn, unsigned sbdn)
outb(9, 0xcd7);
}
-static void ldtstop_sb(void)
+void ldtstop_sb(void)
{
outb(1, 0x2060);
}