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| author | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-05-22 15:07:15 +0000 |
|---|---|---|
| committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-05-22 15:07:15 +0000 |
| commit | 78c733c2b737d0bfba8e9c614ab50a9dd04c8cc8 (patch) | |
| tree | 469db6c2c6a5dde27aee9df989b23781815ac770 /src/southbridge/broadcom | |
| parent | 36de0424f2dd7376cf801a6f02d9842d59d9fac2 (diff) | |
| download | coreboot-78c733c2b737d0bfba8e9c614ab50a9dd04c8cc8.tar.xz | |
Add tinybootblock support for broadcom/bcm5785.
In the bootblock, 4MB of ROM are mapped instead of the
default 1MB
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5580 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/broadcom')
| -rw-r--r-- | src/southbridge/broadcom/bcm5785/Kconfig | 6 | ||||
| -rw-r--r-- | src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c | 15 | ||||
| -rw-r--r-- | src/southbridge/broadcom/bcm5785/bcm5785_enable_rom.c | 14 | ||||
| -rw-r--r-- | src/southbridge/broadcom/bcm5785/bootblock.c | 5 |
4 files changed, 26 insertions, 14 deletions
diff --git a/src/southbridge/broadcom/bcm5785/Kconfig b/src/southbridge/broadcom/bcm5785/Kconfig index c51dcb2b17..d72afd8d2c 100644 --- a/src/southbridge/broadcom/bcm5785/Kconfig +++ b/src/southbridge/broadcom/bcm5785/Kconfig @@ -1,2 +1,8 @@ config SOUTHBRIDGE_BROADCOM_BCM5785 bool + select HAVE_HARD_RESET + +config BOOTBLOCK_SOUTHBRIDGE_INIT + string + default "southbridge/broadcom/bcm5785/bootblock.c" + depends on SOUTHBRIDGE_BROADCOM_BCM5785 diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c b/src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c index d448bf67c3..62e004dac3 100644 --- a/src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c +++ b/src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c @@ -4,20 +4,7 @@ */ #include <reset.h> -static void bcm5785_enable_rom(void) -{ - unsigned char byte; - device_t addr; - - /* Enable 4MB rom access at 0xFFC00000 - 0xFFFFFFFF */ - /* Locate the BCM 5785 SB PCI Main */ - addr = pci_locate_device(PCI_ID(0x1166, 0x0205), 0); // 0x0201? - - /* Set the 4MB enable bit bit */ - byte = pci_read_config8(addr, 0x41); - byte |= 0x0e; - pci_write_config8(addr, 0x41, byte); -} +#include "bcm5785_enable_rom.c" static void bcm5785_enable_lpc(void) { diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_enable_rom.c b/src/southbridge/broadcom/bcm5785/bcm5785_enable_rom.c new file mode 100644 index 0000000000..7d484d87c2 --- /dev/null +++ b/src/southbridge/broadcom/bcm5785/bcm5785_enable_rom.c @@ -0,0 +1,14 @@ +static void bcm5785_enable_rom(void) +{ + unsigned char byte; + device_t addr; + + /* Enable 4MB rom access at 0xFFC00000 - 0xFFFFFFFF */ + /* Locate the BCM 5785 SB PCI Main */ + addr = pci_locate_device(PCI_ID(0x1166, 0x0205), 0); // 0x0201? + + /* Set the 4MB enable bit bit */ + byte = pci_read_config8(addr, 0x41); + byte |= 0x0e; + pci_write_config8(addr, 0x41, byte); +} diff --git a/src/southbridge/broadcom/bcm5785/bootblock.c b/src/southbridge/broadcom/bcm5785/bootblock.c new file mode 100644 index 0000000000..eab61a367f --- /dev/null +++ b/src/southbridge/broadcom/bcm5785/bootblock.c @@ -0,0 +1,5 @@ +#include "bcm5785_enable_rom.c" + +static void bootblock_southbridge_init(void) { + bcm5785_enable_rom(); +} |