diff options
author | Stefan Reinauer <stepan@coresystems.de> | 2010-03-22 11:42:32 +0000 |
---|---|---|
committer | Stefan Reinauer <stepan@openbios.org> | 2010-03-22 11:42:32 +0000 |
commit | c02b4fc9db3c3c1e263027382697b566127f66bb (patch) | |
tree | 11bd18488e360e5c1beeb9ccb852ef4489c3689a /src/southbridge/broadcom | |
parent | 27852aba6787617ca5656995cbc7e8ef0a3ea22c (diff) | |
download | coreboot-c02b4fc9db3c3c1e263027382697b566127f66bb.tar.xz |
printk_foo -> printk(BIOS_FOO, ...)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5266 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/broadcom')
-rw-r--r-- | src/southbridge/broadcom/bcm21000/bcm21000_pcie.c | 2 | ||||
-rw-r--r-- | src/southbridge/broadcom/bcm5785/bcm5785_lpc.c | 2 | ||||
-rw-r--r-- | src/southbridge/broadcom/bcm5785/bcm5785_sata.c | 6 |
3 files changed, 5 insertions, 5 deletions
diff --git a/src/southbridge/broadcom/bcm21000/bcm21000_pcie.c b/src/southbridge/broadcom/bcm21000/bcm21000_pcie.c index ef3f4509ee..4027f48e7c 100644 --- a/src/southbridge/broadcom/bcm21000/bcm21000_pcie.c +++ b/src/southbridge/broadcom/bcm21000/bcm21000_pcie.c @@ -33,7 +33,7 @@ static void pcie_init(struct device *dev) uint32_t dword; uint32_t msicap; - printk_debug("PCIE enable.... dev= %s\n",dev_path(dev)); + printk(BIOS_DEBUG, "PCIE enable.... dev= %s\n",dev_path(dev)); /* System error enable */ dword = pci_read_config32(dev, 0x04); diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_lpc.c b/src/southbridge/broadcom/bcm5785/bcm5785_lpc.c index 85f9eaf6c4..481d68c74f 100644 --- a/src/southbridge/broadcom/bcm5785/bcm5785_lpc.c +++ b/src/southbridge/broadcom/bcm5785/bcm5785_lpc.c @@ -86,7 +86,7 @@ static void bcm5785_lpc_enable_childrens_resources(device_t dev) if(!(res->flags & IORESOURCE_IO)) continue; base = res->base; end = resource_end(res); - printk_debug("bcm5785lpc decode:%s, base=0x%08x, end=0x%08x\r\n",dev_path(child),base, end); + printk(BIOS_DEBUG, "bcm5785lpc decode:%s, base=0x%08x, end=0x%08x\r\n",dev_path(child),base, end); switch(base) { case 0x60: //KBC case 0x64: diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_sata.c b/src/southbridge/broadcom/bcm5785/bcm5785_sata.c index 6818e6a2b0..7cd9c27f35 100644 --- a/src/southbridge/broadcom/bcm5785/bcm5785_sata.c +++ b/src/southbridge/broadcom/bcm5785/bcm5785_sata.c @@ -49,17 +49,17 @@ static void sata_init(struct device *dev) //init PHY - printk_debug("init PHY...\n"); + printk(BIOS_DEBUG, "init PHY...\n"); for(i=0; i<4; i++) { mmio = base + 0x100 * i; byte = read8(mmio + 0x40); - printk_debug("port %d PHY status = %02x\r\n", i, byte); + printk(BIOS_DEBUG, "port %d PHY status = %02x\r\n", i, byte); if(byte & 0x4) {// bit 2 is set byte = read8(mmio+0x48); write8(mmio + 0x48, byte | 1); write8(mmio + 0x48, byte & (~1)); byte = read8(mmio + 0x40); - printk_debug("after reset port %d PHY status = %02x\r\n", i, byte); + printk(BIOS_DEBUG, "after reset port %d PHY status = %02x\r\n", i, byte); } } |