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author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-04-26 19:30:55 +0200 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2018-05-03 08:28:57 +0000 |
commit | f46810171a58ee974ff8d71e84936eb7df0b47e1 (patch) | |
tree | 8cf7ac3e13a2b650e4e07c909081e32c39b4e1d7 /src/southbridge/broadcom | |
parent | f98a5d6a3207653e3e417162b4b7df4866417c92 (diff) | |
download | coreboot-f46810171a58ee974ff8d71e84936eb7df0b47e1.tar.xz |
southbridge/broadcom: Remove spaces before/after parenthesis
Change-Id: Ic43b5ddaa395658ab7c34cdd004516884a20b005
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/25875
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/southbridge/broadcom')
-rw-r--r-- | src/southbridge/broadcom/bcm5785/bcm5785.c | 6 | ||||
-rw-r--r-- | src/southbridge/broadcom/bcm5785/sata.c | 8 | ||||
-rw-r--r-- | src/southbridge/broadcom/bcm5785/sb_pci_main.c | 4 | ||||
-rw-r--r-- | src/southbridge/broadcom/bcm5785/smbus.h | 4 |
4 files changed, 11 insertions, 11 deletions
diff --git a/src/southbridge/broadcom/bcm5785/bcm5785.c b/src/southbridge/broadcom/bcm5785/bcm5785.c index d9a12686a4..60f7da06aa 100644 --- a/src/southbridge/broadcom/bcm5785/bcm5785.c +++ b/src/southbridge/broadcom/bcm5785/bcm5785.c @@ -29,14 +29,14 @@ void bcm5785_enable(device_t dev) /* See if we are on the behind the pcix bridge */ bus_dev = dev->bus->dev; if ((bus_dev->vendor == PCI_VENDOR_ID_SERVERWORKS) && - (bus_dev->device == 0x0036 )) // device under PCI-X Bridge + (bus_dev->device == 0x0036)) // device under PCI-X Bridge { unsigned devfn; devfn = bus_dev->path.pci.devfn + (1 << 3); sb_pci_main_dev = dev_find_slot(bus_dev->bus->secondary, devfn); // index = ((dev->path.pci.devfn & ~7) >> 3) + 8; } else if ((bus_dev->vendor == PCI_VENDOR_ID_SERVERWORKS) && - (bus_dev->device == 0x0104)) // device under PCI Bridge( under PCI-X ) + (bus_dev->device == 0x0104)) // device under PCI Bridge (under PCI-X) { unsigned devfn; devfn = bus_dev->bus->dev->path.pci.devfn + (1 << 3); @@ -46,7 +46,7 @@ void bcm5785_enable(device_t dev) else { // same bus unsigned devfn; devfn = (dev->path.pci.devfn) & ~7; - if ( dev->vendor == PCI_VENDOR_ID_SERVERWORKS ) { + if (dev->vendor == PCI_VENDOR_ID_SERVERWORKS) { if (dev->device == 0x0036) //PCI-X Bridge { devfn += (1<<3); } else if (dev->device == 0x0223) // USB diff --git a/src/southbridge/broadcom/bcm5785/sata.c b/src/southbridge/broadcom/bcm5785/sata.c index 02331d9007..57df3d2e33 100644 --- a/src/southbridge/broadcom/bcm5785/sata.c +++ b/src/southbridge/broadcom/bcm5785/sata.c @@ -42,13 +42,13 @@ static void sata_init(struct device *dev) write32(mmio_base + 0x10f0, 0x40000001); write32(mmio_base + 0x8c, 0x00ff2007); - mdelay( 10 ); + mdelay(10); write32(mmio_base + 0x8c, 0x78592009); - mdelay( 10 ); + mdelay(10); write32(mmio_base + 0x8c, 0x00082004); - mdelay( 10 ); + mdelay(10); write32(mmio_base + 0x8c, 0x00002004); - mdelay( 10 ); + mdelay(10); //init PHY diff --git a/src/southbridge/broadcom/bcm5785/sb_pci_main.c b/src/southbridge/broadcom/bcm5785/sb_pci_main.c index ab0cd05786..c1294342dd 100644 --- a/src/southbridge/broadcom/bcm5785/sb_pci_main.c +++ b/src/southbridge/broadcom/bcm5785/sb_pci_main.c @@ -43,9 +43,9 @@ static void sb_init(device_t dev) if (nmi_option) { byte &= ~(1 << 7); /* set NMI */ } else { - byte |= ( 1 << 7); // Can not mask NMI from PCI-E and NMI_NOW + byte |= (1 << 7); // Can not mask NMI from PCI-E and NMI_NOW } - if ( byte != byte_old) { + if (byte != byte_old) { outb(byte, 0x70); } diff --git a/src/southbridge/broadcom/bcm5785/smbus.h b/src/southbridge/broadcom/bcm5785/smbus.h index 8ebe203523..1c3c9d7dad 100644 --- a/src/southbridge/broadcom/bcm5785/smbus.h +++ b/src/southbridge/broadcom/bcm5785/smbus.h @@ -66,10 +66,10 @@ static int smbus_wait_until_done(unsigned smbus_io_base) val = inb(smbus_io_base + SMBHSTSTAT); val &= 0x1f; // mask off reserved bits - if ( val & 0x1c) { + if (val & 0x1c) { return -5; // error } - if ( val == 0x02) { + if (val == 0x02) { outb(val, smbus_io_base + SMBHSTSTAT); // clear status return 0; // } |