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authorPatrick Rudolph <siro@das-labor.org>2018-10-01 19:17:11 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-10-22 08:35:25 +0000
commit45022ae056cdbf58429b77daf2da176306312801 (patch)
tree4218666e3c14e41232778c4ceff301292b3c61d9 /src/southbridge/intel/bd82x6x/Kconfig
parent33fcaf91ff825ad0adf0a2a483e6a296ed4e0e31 (diff)
downloadcoreboot-45022ae056cdbf58429b77daf2da176306312801.tar.xz
intel: Use CF9 reset (part 1)
Add SOUTHBRIDGE_INTEL_COMMON_RESET for all Intel platforms that used to perform a "system reset" in their hard_reset() implementation. Replace all duplicate CF9 reset implementations for these platforms. Change-Id: I8e359b0c4d5a1060edd0940d24c2f78dfed8a590 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/28862 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/Kconfig')
-rw-r--r--src/southbridge/intel/bd82x6x/Kconfig1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig
index 16602cf883..20cdeb84e3 100644
--- a/src/southbridge/intel/bd82x6x/Kconfig
+++ b/src/southbridge/intel/bd82x6x/Kconfig
@@ -29,7 +29,6 @@ config SOUTH_BRIDGE_OPTIONS # dummy
select SOUTHBRIDGE_INTEL_COMMON_SMBUS
select SOUTHBRIDGE_INTEL_COMMON_SPI
select IOAPIC
- select HAVE_HARD_RESET
select HAVE_USBDEBUG_OPTIONS
select HAVE_SMI_HANDLER
select USE_WATCHDOG_ON_BOOT