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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-07-03 09:44:28 +0300 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-07-10 00:57:09 +0200 |
| commit | 872c9222965909dffdd091e644b03e676ca2754f (patch) | |
| tree | 25de10840a1ff5d3078f89949a72c767693ee8c1 /src/southbridge/intel/bd82x6x/Kconfig | |
| parent | 20b6d91fd33f5d90d1c51e2fb813453349398b73 (diff) | |
| download | coreboot-872c9222965909dffdd091e644b03e676ca2754f.tar.xz | |
Fix MMCONF_SUPPORT_DEFAULT for ramstage
Define at one place whether to use IO 0xcf8/0xcfc or MMIO via
MMCONF_BASE_ADDRESS for PCI configuration access funtions in ramstage.
The implementation of pci_default_config() always returned with
pci_cf8_conf1. This means any PCI configuration access that did
not target bus 0 used PCI IO config operations, if PCI MMIO config
was not explicitly requested.
Change-Id: I3b04f570fe88d022cd60dde8bb98e76bd00fe612
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3606
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/Kconfig')
0 files changed, 0 insertions, 0 deletions