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author | Vladimir Serbinenko <phcoder@gmail.com> | 2014-09-17 02:38:51 +0200 |
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committer | Vladimir Serbinenko <phcoder@gmail.com> | 2014-10-17 11:05:47 +0200 |
commit | 3dc12c1e19181bb9bacebeda706c39cfb57eb326 (patch) | |
tree | 5834c1758eea5faa9a61eec7dc8fce62eb05a17c /src/southbridge/intel/bd82x6x/Makefile.inc | |
parent | cb0d772eef12ce89d31197d0e71b103c7b3cf02c (diff) | |
download | coreboot-3dc12c1e19181bb9bacebeda706c39cfb57eb326.tar.xz |
bd82x6x: Consolidate early native USB init
Change-Id: I6189930fd3c69c3497e4cf1a78035e6614761b13
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6923
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/Makefile.inc')
-rw-r--r-- | src/southbridge/intel/bd82x6x/Makefile.inc | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/southbridge/intel/bd82x6x/Makefile.inc b/src/southbridge/intel/bd82x6x/Makefile.inc index b79b85a0a9..3d33edcd13 100644 --- a/src/southbridge/intel/bd82x6x/Makefile.inc +++ b/src/southbridge/intel/bd82x6x/Makefile.inc @@ -47,14 +47,14 @@ smm-$(CONFIG_SPI_FLASH_SMM) += ../common/spi.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c me.c me_8.x.c finalize.c pch.c -romstage-y += early_usb.c early_smbus.c me_status.c gpio.c +romstage-y += early_smbus.c me_status.c gpio.c romstage-y += reset.c romstage-y += early_spi.c early_pch.c -romstage-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += early_me.c -romstage-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE) += early_me.c -romstage-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE_NATIVE) += early_thermal.c early_pch_native.c early_me_native.c -romstage-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE_NATIVE) += early_thermal.c early_pch_native.c early_me_native.c +romstage-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += early_me.c early_usb.c +romstage-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE) += early_me.c early_usb.c +romstage-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE_NATIVE) += early_thermal.c early_pch_native.c early_me_native.c early_usb_native.c +romstage-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE_NATIVE) += early_thermal.c early_pch_native.c early_me_native.c early_usb_native.c ifeq ($(CONFIG_BUILD_WITH_FAKE_IFD),y) IFD_BIN_PATH := $(objgenerated)/ifdfake.bin |