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authorDuncan Laurie <dlaurie@chromium.org>2012-06-23 17:06:47 -0700
committerRonald G. Minnich <rminnich@gmail.com>2012-07-25 22:25:22 +0200
commit800e950d646d687aa4231e8eced06a0615ba7344 (patch)
tree18213cc8691ec4c45211842dedfcea2da7e0d843 /src/southbridge/intel/bd82x6x/Makefile.inc
parent27e5aacc522a4ce97ffd8d57a93042d9703d70fe (diff)
downloadcoreboot-800e950d646d687aa4231e8eced06a0615ba7344.tar.xz
ELOG: Log boot-time events found in southbridge
This is called from the SMI handler install because those setup functions clear many of these registers. Ensure that these events show up in the log as appropriate. Example log output: 159 | 2012-06-23 14:31:54 | SUS Power Fail 160 | 2012-06-23 14:31:54 | System Reset 161 | 2012-06-23 14:31:54 | ACPI Wake | S5 Change-Id: I48c423c10ee7e6c2829bcc95f6cfabb4979c25a9 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/1319 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/Makefile.inc')
-rw-r--r--src/southbridge/intel/bd82x6x/Makefile.inc1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/southbridge/intel/bd82x6x/Makefile.inc b/src/southbridge/intel/bd82x6x/Makefile.inc
index 3de2bd0384..f9aade812c 100644
--- a/src/southbridge/intel/bd82x6x/Makefile.inc
+++ b/src/southbridge/intel/bd82x6x/Makefile.inc
@@ -32,6 +32,7 @@ ramstage-y += me_status.c
ramstage-y += reset.c
ramstage-y += watchdog.c
+ramstage-$(CONFIG_ELOG) += elog.c
ramstage-y += spi.c
smm-$(CONFIG_SPI_FLASH_SMM) += spi.c