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authorKyösti Mälkki <kyosti.malkki@gmail.com>2013-09-07 11:38:56 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2013-09-21 06:20:02 +0200
commite28bd4ade6f716024afdff0bac48028a42a62e71 (patch)
tree518e4b663acf7e9bd7b09646c4a976e85c765173 /src/southbridge/intel/bd82x6x/Makefile.inc
parentc8883262cf1375616743ba9d1f259b4fcda20d72 (diff)
downloadcoreboot-e28bd4ade6f716024afdff0bac48028a42a62e71.tar.xz
timestamps intel: Move timestamp scratchpad to chipset
This retrieves back the value stored with store_initial_timestamp() in the bootblock for southbridge. Change-Id: I377c823706c33ed65af023d20d2e4323edd31199 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3908 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/Makefile.inc')
-rw-r--r--src/southbridge/intel/bd82x6x/Makefile.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/bd82x6x/Makefile.inc b/src/southbridge/intel/bd82x6x/Makefile.inc
index ffd894338f..8abc56a7a2 100644
--- a/src/southbridge/intel/bd82x6x/Makefile.inc
+++ b/src/southbridge/intel/bd82x6x/Makefile.inc
@@ -47,7 +47,7 @@ smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c me.c me_8.x.c finalize.c pch.c
romstage-y += early_usb.c early_smbus.c early_me.c me_status.c gpio.c
romstage-y += reset.c
-romstage-y += early_spi.c
+romstage-y += early_spi.c early_pch.c
ifeq ($(CONFIG_BUILD_WITH_FAKE_IFD),y)
IFD_BIN_PATH := $(objgenerated)/ifdfake.bin