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| author | Vladimir Serbinenko <phcoder@gmail.com> | 2014-10-25 15:20:55 +0200 |
|---|---|---|
| committer | Vladimir Serbinenko <phcoder@gmail.com> | 2014-11-08 13:41:48 +0100 |
| commit | 5b044ae6077bfd6bbc162741cc5b3086dbf56d34 (patch) | |
| tree | e9c19449268b2b4af80bc8aa64eced8ff8e950a6 /src/southbridge/intel/bd82x6x/chip.h | |
| parent | 986e85c098f6a68c2f26d1b5f81bebaff4207e28 (diff) | |
| download | coreboot-5b044ae6077bfd6bbc162741cc5b3086dbf56d34.tar.xz | |
bd82x6x: Move to common FADT.
Change-Id: I04ed600796c55f5af4f0a07687f676e6484a9830
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7200
Reviewed-by: Nicolas Reinecke <nr@das-labor.org>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge/intel/bd82x6x/chip.h')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/chip.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/southbridge/intel/bd82x6x/chip.h b/src/southbridge/intel/bd82x6x/chip.h index 0f2f0e9cc2..e5da531e75 100644 --- a/src/southbridge/intel/bd82x6x/chip.h +++ b/src/southbridge/intel/bd82x6x/chip.h @@ -96,6 +96,10 @@ struct southbridge_intel_bd82x6x_config { uint8_t pcie_aspm_f5; uint8_t pcie_aspm_f6; uint8_t pcie_aspm_f7; + + int p_cnt_throttling_supported; + int c2_latency; + int docking_supported; }; #endif /* SOUTHBRIDGE_INTEL_BD82X6X_CHIP_H */ |