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authorArthur Heymans <arthur@aheymans.xyz>2019-11-12 17:21:08 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-11-18 11:46:51 +0000
commit2b28a160618018b4d7b7930362e1088c2313901b (patch)
tree044e169f851fb29f9842f8b14081f1ca64ba63a6 /src/southbridge/intel/bd82x6x/early_pch.c
parent9c538348d8ccaef2c3dd6b898a1f44b00ea59690 (diff)
downloadcoreboot-2b28a160618018b4d7b7930362e1088c2313901b.tar.xz
sb/intel/bd82x6x: Make the pch_enable_lpc hook optional
This also changes the name to mainboard_pch_lpc_setup to better reflect that it is an optional mainboard hook. This adds an empty weakly linked default. The rationale behind this change is that without an implementation of the hook some features might not work but that the result is likely still able to boot, so it can be made optional. Change-Id: Ie8e6056b4c4aed3739d2d12b4224de36fe217189 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36782 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/early_pch.c')
-rw-r--r--src/southbridge/intel/bd82x6x/early_pch.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/src/southbridge/intel/bd82x6x/early_pch.c b/src/southbridge/intel/bd82x6x/early_pch.c
index d8fd7ad6a5..8ffb22e140 100644
--- a/src/southbridge/intel/bd82x6x/early_pch.c
+++ b/src/southbridge/intel/bd82x6x/early_pch.c
@@ -286,12 +286,16 @@ static void pch_enable_lpc_decode(void)
pci_write_config32(PCH_LPC_DEV, LPC_GEN4_DEC, config->gen4_dec);
}
+__weak void mainboard_pch_lpc_setup(void)
+{
+}
+
void early_pch_init(void)
{
pch_enable_lpc_decode();
- pch_enable_lpc();
+ mainboard_pch_lpc_setup();
pch_enable_bars();