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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-12-21 08:52:31 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-12-27 09:01:12 +0000 |
| commit | 405812209d76d35a47656b31c958a38b8cd9a109 (patch) | |
| tree | 038a3722be6a229878d561cd56958302f551d62b /src/southbridge/intel/bd82x6x/early_pch.c | |
| parent | 25c6d3a35ff673bc12315aec45178f8a9078578f (diff) | |
| download | coreboot-405812209d76d35a47656b31c958a38b8cd9a109.tar.xz | |
arch/x86: Remove <arch/cbfs.h>
There are no symmetrical headerfiles for other arch/ and
after ROMCC_BOOTBLOCK and walkcbfs() removal this file
ended up empty.
Change-Id: Ice3047630ced1f1471775411b93be6383f53e8bb
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37886
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/early_pch.c')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/early_pch.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/southbridge/intel/bd82x6x/early_pch.c b/src/southbridge/intel/bd82x6x/early_pch.c index b12ad38f47..b19216b9ec 100644 --- a/src/southbridge/intel/bd82x6x/early_pch.c +++ b/src/southbridge/intel/bd82x6x/early_pch.c @@ -15,7 +15,6 @@ #include <device/mmio.h> #include <device/pci_ops.h> -#include <arch/cbfs.h> #include <cf9_reset.h> #include <ip_checksum.h> #include <device/pci_def.h> |